diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-08-08 13:26:14 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-08-16 14:02:53 +0100 |
| commit | adefba76e8bf10dfb342094d2f5debfeedb1a74d (patch) | |
| tree | 4c53f92773407a97a229609ff72d268b466c3064 | |
| parent | dd861b3f29be97a9e3cdb9769dcbc0c7d7825185 (diff) | |
| download | qemu-adefba76e8bf10dfb342094d2f5debfeedb1a74d.zip qemu-adefba76e8bf10dfb342094d2f5debfeedb1a74d.tar.gz qemu-adefba76e8bf10dfb342094d2f5debfeedb1a74d.tar.bz2 | |
target/arm: Use tcg_gen_rotri_i32 for gen_swap_half
Rotate is the more compact and obvious way to swap 16-bit
elements of a 32-bit word.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190808202616.13782-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 02ce8d4..2e16064 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -444,11 +444,7 @@ static TCGv_i64 gen_muls_i64_i32(TCGv_i32 a, TCGv_i32 b) /* Swap low and high halfwords. */ static void gen_swap_half(TCGv_i32 var) { - TCGv_i32 tmp = tcg_temp_new_i32(); - tcg_gen_shri_i32(tmp, var, 16); - tcg_gen_shli_i32(var, var, 16); - tcg_gen_or_i32(var, var, tmp); - tcg_temp_free_i32(tmp); + tcg_gen_rotri_i32(var, var, 16); } /* Dual 16-bit add. Result placed in t0 and t1 is marked as dead. |