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author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-09-25 14:56:56 -0300 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2023-10-12 12:01:10 +1000 |
commit | a7e87cd7bfd4580bc745cf12440f4e26329bc747 (patch) | |
tree | 194731ea0316987bd4306f1472a594e142cf30ed | |
parent | 977bbb04525682fd7a2ed8d28c0590bc2873db06 (diff) | |
download | qemu-a7e87cd7bfd4580bc745cf12440f4e26329bc747.zip qemu-a7e87cd7bfd4580bc745cf12440f4e26329bc747.tar.gz qemu-a7e87cd7bfd4580bc745cf12440f4e26329bc747.tar.bz2 |
target/riscv: move 'host' CPU declaration to kvm.c
This CPU only exists if we're compiling with KVM so move it to the kvm
specific file.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230925175709.35696-7-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r-- | target/riscv/cpu.c | 15 | ||||
-rw-r--r-- | target/riscv/kvm.c | 21 |
2 files changed, 21 insertions, 15 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a6a26c0..d78f73a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -652,18 +652,6 @@ static void rv32_imafcu_nommu_cpu_init(Object *obj) } #endif -#if defined(CONFIG_KVM) -static void riscv_host_cpu_init(Object *obj) -{ - CPURISCVState *env = &RISCV_CPU(obj)->env; -#if defined(TARGET_RISCV32) - set_misa(env, MXL_RV32, 0); -#elif defined(TARGET_RISCV64) - set_misa(env, MXL_RV64, 0); -#endif -} -#endif /* CONFIG_KVM */ - static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; @@ -2037,9 +2025,6 @@ static const TypeInfo riscv_cpu_type_infos[] = { }, DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_ANY, riscv_any_cpu_init), DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_MAX, riscv_max_cpu_init), -#if defined(CONFIG_KVM) - DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init), -#endif #if defined(TARGET_RISCV32) DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE32, rv32_base_cpu_init), DEFINE_CPU(TYPE_RISCV_CPU_IBEX, rv32_ibex_cpu_init), diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 1e4e445..31d2ede 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -1271,3 +1271,24 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift, kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled(); } + +static void riscv_host_cpu_init(Object *obj) +{ + CPURISCVState *env = &RISCV_CPU(obj)->env; + +#if defined(TARGET_RISCV32) + env->misa_mxl_max = env->misa_mxl = MXL_RV32; +#elif defined(TARGET_RISCV64) + env->misa_mxl_max = env->misa_mxl = MXL_RV64; +#endif +} + +static const TypeInfo riscv_kvm_cpu_type_infos[] = { + { + .name = TYPE_RISCV_CPU_HOST, + .parent = TYPE_RISCV_CPU, + .instance_init = riscv_host_cpu_init, + } +}; + +DEFINE_TYPES(riscv_kvm_cpu_type_infos) |