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author | Richard Henderson <richard.henderson@linaro.org> | 2025-04-30 17:09:28 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2025-05-05 09:24:10 -0700 |
commit | a21959a8a835783b556d4a1d18aaa2fad4b7ea62 (patch) | |
tree | 9cab0b79c98eb8eb0411068cb96b55310a15ea03 | |
parent | 9b74d403b30e64256b4b94cbc01c76a0382ca5e8 (diff) | |
download | qemu-a21959a8a835783b556d4a1d18aaa2fad4b7ea62.zip qemu-a21959a8a835783b556d4a1d18aaa2fad4b7ea62.tar.gz qemu-a21959a8a835783b556d4a1d18aaa2fad4b7ea62.tar.bz2 |
accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
This is a probing function, not a load/store function.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | include/accel/tcg/cpu-ldst.h | 16 | ||||
-rw-r--r-- | include/accel/tcg/probe.h | 16 |
2 files changed, 16 insertions, 16 deletions
diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h index 00e6419..0de7f5e 100644 --- a/include/accel/tcg/cpu-ldst.h +++ b/include/accel/tcg/cpu-ldst.h @@ -502,20 +502,4 @@ static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) return cpu_ldq_code_mmu(env, addr, oi, 0); } -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, - MMUAccessType access_type, int mmu_idx); - #endif /* ACCEL_TCG_CPU_LDST_H */ diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h index 177bd16..dd9ecbb 100644 --- a/include/accel/tcg/probe.h +++ b/include/accel/tcg/probe.h @@ -103,4 +103,20 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, #endif /* !CONFIG_USER_ONLY */ +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, + MMUAccessType access_type, int mmu_idx); + #endif |