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| author | Bernhard Beschow <shentey@gmail.com> | 2022-10-22 17:04:52 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2022-10-31 11:32:07 +0100 |
| commit | a1c100d0fbdcee230341262c3874513ce70ff38f (patch) | |
| tree | 8785fa270e5f68975d469c723fe74d403c98cb7b | |
| parent | 195f7e77de374b6b9776be3bbbc71c7a11ae5622 (diff) | |
| download | qemu-a1c100d0fbdcee230341262c3874513ce70ff38f.zip qemu-a1c100d0fbdcee230341262c3874513ce70ff38f.tar.gz qemu-a1c100d0fbdcee230341262c3874513ce70ff38f.tar.bz2 | |
hw/isa/piix4: Add missing initialization
PIIX3 clears its reset control register, so do the same in PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20221022150508.26830-28-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| -rw-r--r-- | hw/isa/piix4.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index e05e65d..9126eb9 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -140,6 +140,8 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0xab] = 0x00; pci_conf[0xac] = 0x00; pci_conf[0xae] = 0x00; + + d->rcr = 0; } static int piix4_post_load(void *opaque, int version_id) |