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authorRichard Henderson <richard.henderson@linaro.org>2025-02-04 11:06:26 -0800
committerRichard Henderson <richard.henderson@linaro.org>2025-02-18 07:33:42 -0800
commita0ecb8e49418ab0bb01d47493fafe6a0a357e952 (patch)
treea9ff6aa26f69cfa7431519f7e8a3e50481fc290f
parentf441b4d19b289f55a378b8d033994f45a333b581 (diff)
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tcg: Drop support for two address registers in gen_ldst
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--tcg/tcg-op-ldst.c21
-rw-r--r--tcg/tcg.c4
2 files changed, 4 insertions, 21 deletions
diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c
index 77271e0..7ba9a3e 100644
--- a/tcg/tcg-op-ldst.c
+++ b/tcg/tcg-op-ldst.c
@@ -91,25 +91,10 @@ static MemOp tcg_canonicalize_memop(MemOp op, bool is64, bool st)
static void gen_ldst(TCGOpcode opc, TCGType type, TCGTemp *vl, TCGTemp *vh,
TCGTemp *addr, MemOpIdx oi)
{
- if (TCG_TARGET_REG_BITS == 64 || tcg_ctx->addr_type == TCG_TYPE_I32) {
- if (vh) {
- tcg_gen_op4(opc, type, temp_arg(vl), temp_arg(vh),
- temp_arg(addr), oi);
- } else {
- tcg_gen_op3(opc, type, temp_arg(vl), temp_arg(addr), oi);
- }
+ if (vh) {
+ tcg_gen_op4(opc, type, temp_arg(vl), temp_arg(vh), temp_arg(addr), oi);
} else {
- /* See TCGV_LOW/HIGH. */
- TCGTemp *al = addr + HOST_BIG_ENDIAN;
- TCGTemp *ah = addr + !HOST_BIG_ENDIAN;
-
- if (vh) {
- tcg_gen_op5(opc, type, temp_arg(vl), temp_arg(vh),
- temp_arg(al), temp_arg(ah), oi);
- } else {
- tcg_gen_op4(opc, type, temp_arg(vl),
- temp_arg(al), temp_arg(ah), oi);
- }
+ tcg_gen_op3(opc, type, temp_arg(vl), temp_arg(addr), oi);
}
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 53de13d..14c2d38 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1690,9 +1690,7 @@ void tcg_func_start(TCGContext *s)
s->emit_before_op = NULL;
QSIMPLEQ_INIT(&s->labels);
- tcg_debug_assert(s->addr_type == TCG_TYPE_I32 ||
- s->addr_type == TCG_TYPE_I64);
-
+ tcg_debug_assert(s->addr_type <= TCG_TYPE_REG);
tcg_debug_assert(s->insn_start_words > 0);
}