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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2017-03-28 19:13:49 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-04-26 12:00:41 +1000 |
| commit | a01f3432dd005fc3f216fe3e2b88dc986f0474a9 (patch) | |
| tree | 20d5f5f25d731747ba694f5bc9ce39eadb2a6dc6 | |
| parent | 3dc410ae83e6cb76c81ea30a05d62596092b3165 (diff) | |
| download | qemu-a01f3432dd005fc3f216fe3e2b88dc986f0474a9.zip qemu-a01f3432dd005fc3f216fe3e2b88dc986f0474a9.tar.gz qemu-a01f3432dd005fc3f216fe3e2b88dc986f0474a9.tar.bz2 | |
spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask
If a page size used by QEMU is not enabled in the PHB IOMMU page mask,
in-kernel acceleration of TCE handling won't be enabled and performance
might be slower than expected.
This prints a warning if system page size is not enabled. This should
print a warning if huge pages are enabled but sphb.pgsz still uses
the default value of 4K|64K.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | hw/ppc/spapr_pci.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 98c52e4..097ebdd 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1771,6 +1771,12 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) } /* DMA setup */ + if ((sphb->page_size_mask & qemu_getrampagesize()) == 0) { + error_report("System page size 0x%lx is not enabled in page_size_mask " + "(0x%"PRIx64"). Performance may be slow", + qemu_getrampagesize(), sphb->page_size_mask); + } + for (i = 0; i < windows_supported; ++i) { tcet = spapr_tce_new_table(DEVICE(sphb), sphb->dma_liobn[i]); if (!tcet) { |