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author | Hervé Poussineau <hpoussin@reactos.org> | 2013-09-13 13:58:44 +0200 |
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committer | Michael S. Tsirkin <mst@redhat.com> | 2013-09-15 11:49:51 +0300 |
commit | 9f1a029abf15751e32a4b1df99ed2b8315f9072c (patch) | |
tree | 18b39e10d04fc9851e217acac3f960a0603b7f42 | |
parent | c046e8c4a26c902ca1b4f5bdf668a2da6bc75f54 (diff) | |
download | qemu-9f1a029abf15751e32a4b1df99ed2b8315f9072c.zip qemu-9f1a029abf15751e32a4b1df99ed2b8315f9072c.tar.gz qemu-9f1a029abf15751e32a4b1df99ed2b8315f9072c.tar.bz2 |
pci: remove explicit check to 64K ioport size
This check is useless, as bigger addresses will be ignored when
added to 'io' MemoryRegion, which has a size of 64K.
However, some architectures don't use the 'io' MemoryRegion, like
the alpha and versatile platforms. They create a PCI I/O region
bigger than 64K, so let them handle PCI I/O BARs in the higher range.
MST: reinstated work-around for BAR sizing.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r-- | hw/pci/pci.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 52cbab7..00554a0 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1028,8 +1028,10 @@ static pcibus_t pci_bar_address(PCIDevice *d, } new_addr = pci_get_long(d->config + bar) & ~(size - 1); last_addr = new_addr + size - 1; - /* NOTE: we have only 64K ioports on PC */ - if (last_addr <= new_addr || new_addr == 0 || last_addr > UINT16_MAX) { + /* Check if 32 bit BAR wraps around explicitly. + * TODO: make priorities correct and remove this work around. + */ + if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX) { return PCI_BAR_UNMAPPED; } return new_addr; |