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| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-03-05 16:34:25 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-03-05 17:02:03 +0100 |
| commit | 9e9509421f9027cd0b17be332ecb0f43f0d02a33 (patch) | |
| tree | 46cb46e1161fe112fccecade936d5c71464c1dd2 | |
| parent | ca2b40b7e660ba39537442187aadc74cbe932e54 (diff) | |
| download | qemu-9e9509421f9027cd0b17be332ecb0f43f0d02a33.zip qemu-9e9509421f9027cd0b17be332ecb0f43f0d02a33.tar.gz qemu-9e9509421f9027cd0b17be332ecb0f43f0d02a33.tar.bz2 | |
tests/tcg: target/mips: Add wrappers for various MSA instructions
Add wrappers for various MSA integer instructions.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
| -rw-r--r-- | tests/tcg/mips/include/wrappers_msa.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 302f0ab..c650ed2 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -152,5 +152,75 @@ DO_MSA__WD__WS_WT(MIN_U_H, min_u.h) DO_MSA__WD__WS_WT(MIN_U_W, min_u.w) DO_MSA__WD__WS_WT(MIN_U_D, min_u.d) +DO_MSA__WD__WS_WT(BCLR_B, bclr.b) +DO_MSA__WD__WS_WT(BCLR_H, bclr.h) +DO_MSA__WD__WS_WT(BCLR_W, bclr.w) +DO_MSA__WD__WS_WT(BCLR_D, bclr.d) + +DO_MSA__WD__WS_WT(BSET_B, bset.b) +DO_MSA__WD__WS_WT(BSET_H, bset.h) +DO_MSA__WD__WS_WT(BSET_W, bset.w) +DO_MSA__WD__WS_WT(BSET_D, bset.d) + +DO_MSA__WD__WS_WT(BNEG_B, bneg.b) +DO_MSA__WD__WS_WT(BNEG_H, bneg.h) +DO_MSA__WD__WS_WT(BNEG_W, bneg.w) +DO_MSA__WD__WS_WT(BNEG_D, bneg.d) + +DO_MSA__WD__WS_WT(PCKEV_B, pckev.b) +DO_MSA__WD__WS_WT(PCKEV_H, pckev.h) +DO_MSA__WD__WS_WT(PCKEV_W, pckev.w) +DO_MSA__WD__WS_WT(PCKEV_D, pckev.d) + +DO_MSA__WD__WS_WT(PCKOD_B, pckod.b) +DO_MSA__WD__WS_WT(PCKOD_H, pckod.h) +DO_MSA__WD__WS_WT(PCKOD_W, pckod.w) +DO_MSA__WD__WS_WT(PCKOD_D, pckod.d) + +DO_MSA__WD__WS_WT(VSHF_B, vshf.b) +DO_MSA__WD__WS_WT(VSHF_H, vshf.h) +DO_MSA__WD__WS_WT(VSHF_W, vshf.w) +DO_MSA__WD__WS_WT(VSHF_D, vshf.d) + +DO_MSA__WD__WS_WT(SLL_B, sll.b) +DO_MSA__WD__WS_WT(SLL_H, sll.h) +DO_MSA__WD__WS_WT(SLL_W, sll.w) +DO_MSA__WD__WS_WT(SLL_D, sll.d) + +DO_MSA__WD__WS_WT(SRA_B, sra.b) +DO_MSA__WD__WS_WT(SRA_H, sra.h) +DO_MSA__WD__WS_WT(SRA_W, sra.w) +DO_MSA__WD__WS_WT(SRA_D, sra.d) + +DO_MSA__WD__WS_WT(SRAR_B, srar.b) +DO_MSA__WD__WS_WT(SRAR_H, srar.h) +DO_MSA__WD__WS_WT(SRAR_W, srar.w) +DO_MSA__WD__WS_WT(SRAR_D, srar.d) + +DO_MSA__WD__WS_WT(SRL_B, srl.b) +DO_MSA__WD__WS_WT(SRL_H, srl.h) +DO_MSA__WD__WS_WT(SRL_W, srl.w) +DO_MSA__WD__WS_WT(SRL_D, srl.d) + +DO_MSA__WD__WS_WT(SRLR_B, srlr.b) +DO_MSA__WD__WS_WT(SRLR_H, srlr.h) +DO_MSA__WD__WS_WT(SRLR_W, srlr.w) +DO_MSA__WD__WS_WT(SRLR_D, srlr.d) + +DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) +DO_MSA__WD__WS_WT(BMZ_V, bmz.v) + +DO_MSA__WD__WS_WT(FMAX_W, fmax.w) +DO_MSA__WD__WS_WT(FMAX_D, fmax.d) + +DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w) +DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d) + +DO_MSA__WD__WS_WT(FMIN_W, fmin.w) +DO_MSA__WD__WS_WT(FMIN_D, fmin.d) + +DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w) +DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d) + #endif |