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authorBibo Mao <maobibo@loongson.cn>2025-04-10 16:50:04 +0800
committerSong Gao <gaosong@loongson.cn>2025-04-24 09:54:43 +0800
commit9d7a951e352e7b99b8d96826ac9fdd384412137a (patch)
tree8e82d3e6fb79e8143d803cf03b26ab8bd71dce4c
parent91d0d16b44c93fa82cf76ae12990ce3aa96096c9 (diff)
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hw/intc/loongarch_pch_msi: Remove gpio input handler
MSI interrupt is triggered by writing message on specified memory address. In generic it is used by PCI devices, and no device is connected pch MSI irqchip with GPIO pin line method, here remove gpio input setting for MSI controller. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Tested-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250410085004.3577627-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
-rw-r--r--hw/intc/loongarch_pch_msi.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
index 66b5c1e..bc93504 100644
--- a/hw/intc/loongarch_pch_msi.c
+++ b/hw/intc/loongarch_pch_msi.c
@@ -42,13 +42,6 @@ static const MemoryRegionOps loongarch_pch_msi_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static void pch_msi_irq_handler(void *opaque, int irq, int level)
-{
- LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(opaque);
-
- qemu_set_irq(s->pch_msi_irq[irq], level);
-}
-
static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp)
{
LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev);
@@ -59,9 +52,7 @@ static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp)
}
s->pch_msi_irq = g_new(qemu_irq, s->irq_num);
-
qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num);
- qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num);
}
static void loongarch_pch_msi_unrealize(DeviceState *dev)