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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 18:28:07 +0000 |
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| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 18:28:07 +0000 |
| commit | 9b686843a0d88d78553aeea4cd1b976a58db1863 (patch) | |
| tree | 233a64045c5f53b9991be444557804f2e1c0a1a6 | |
| parent | 84774e8ea3259d05036678e29936013d6c7eeff7 (diff) | |
| download | qemu-9b686843a0d88d78553aeea4cd1b976a58db1863.zip qemu-9b686843a0d88d78553aeea4cd1b976a58db1863.tar.gz qemu-9b686843a0d88d78553aeea4cd1b976a58db1863.tar.bz2 | |
Fix truncate/extend reversal in MIPS DIV{, U} handling, by Richard Sandiford.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4620 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-mips/translate.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index fefa2c2..d6239a5 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1906,12 +1906,12 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, TCGv r_tmp2 = new_tmp(); TCGv r_tmp3 = new_tmp(); - tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]); - tcg_gen_ext_i32_tl(r_tmp2, cpu_T[1]); + tcg_gen_trunc_tl_i32(r_tmp1, cpu_T[0]); + tcg_gen_trunc_tl_i32(r_tmp2, cpu_T[1]); tcg_gen_div_i32(r_tmp3, r_tmp1, r_tmp2); tcg_gen_rem_i32(r_tmp1, r_tmp1, r_tmp2); - tcg_gen_trunc_tl_i32(cpu_T[0], r_tmp3); - tcg_gen_trunc_tl_i32(cpu_T[1], r_tmp1); + tcg_gen_ext_i32_tl(cpu_T[0], r_tmp3); + tcg_gen_ext_i32_tl(cpu_T[1], r_tmp1); gen_store_LO(cpu_T[0], 0); gen_store_HI(cpu_T[1], 0); dead_tmp(r_tmp1); @@ -1932,12 +1932,12 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, TCGv r_tmp2 = new_tmp(); TCGv r_tmp3 = new_tmp(); - tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]); - tcg_gen_ext_i32_tl(r_tmp2, cpu_T[1]); + tcg_gen_trunc_tl_i32(r_tmp1, cpu_T[0]); + tcg_gen_trunc_tl_i32(r_tmp2, cpu_T[1]); tcg_gen_divu_i32(r_tmp3, r_tmp1, r_tmp2); tcg_gen_remu_i32(r_tmp1, r_tmp1, r_tmp2); - tcg_gen_trunc_tl_i32(cpu_T[0], r_tmp3); - tcg_gen_trunc_tl_i32(cpu_T[1], r_tmp1); + tcg_gen_ext_i32_tl(cpu_T[0], r_tmp3); + tcg_gen_ext_i32_tl(cpu_T[1], r_tmp1); gen_store_LO(cpu_T[0], 0); gen_store_HI(cpu_T[1], 0); dead_tmp(r_tmp1); |