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authorIgor Mammedov <imammedo@redhat.com>2020-09-23 05:46:47 -0400
committerMichael S. Tsirkin <mst@redhat.com>2020-09-29 02:15:24 -0400
commit998ba95016c91790dc4d3c5b95775de730dc30a0 (patch)
tree5ee4dfdb4315d8b7c2432ab671f6e98cd4bd257e
parent6d837f1f38c235ea5f63488d0274407becd91e5c (diff)
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x86: acpi: introduce the PCI0.SMI0 ACPI device
When CPU hotplug with SMI has been negotiated, describe the SMI register block in the DSDT. Pass the ACPI name of the SMI control register to build_cpus_aml(), so that CPU_SCAN_METHOD can access the register in the next patch. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200923094650.1301166-9-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/i386/acpi-build.c29
-rw-r--r--include/hw/acpi/cpu.h1
2 files changed, 29 insertions, 1 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b408d62..b49d360 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1521,6 +1521,32 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_UID", aml_int(0)));
aml_append(dev, build_q35_osc_method());
aml_append(sb_scope, dev);
+
+ if (pm->smi_on_cpuhp) {
+ /* reserve SMI block resources, IO ports 0xB2, 0xB3 */
+ dev = aml_device("PCI0.SMI0");
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
+ aml_append(dev, aml_name_decl("_UID", aml_string("SMI resources")));
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(
+ AML_DECODE16,
+ ACPI_PORT_SMI_CMD,
+ ACPI_PORT_SMI_CMD,
+ 1,
+ 2)
+ );
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(dev, aml_operation_region("SMIR", AML_SYSTEM_IO,
+ aml_int(ACPI_PORT_SMI_CMD), 2));
+ field = aml_field("SMIR", AML_BYTE_ACC, AML_NOLOCK,
+ AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("SMIC", 8));
+ aml_append(field, aml_reserved_field(8));
+ aml_append(dev, field);
+ aml_append(sb_scope, dev);
+ }
+
aml_append(dsdt, sb_scope);
build_hpet_aml(dsdt);
@@ -1536,7 +1562,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base);
} else {
CPUHotplugFeatures opts = {
- .acpi_1_compatible = true, .has_legacy_cphp = true
+ .acpi_1_compatible = true, .has_legacy_cphp = true,
+ .smi_path = pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL,
};
build_cpus_aml(dsdt, machine, opts, pm->cpu_hp_io_base,
"\\_SB.PCI0", "\\_GPE._E02");
diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
index 62f0278..0eeedaa 100644
--- a/include/hw/acpi/cpu.h
+++ b/include/hw/acpi/cpu.h
@@ -50,6 +50,7 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
typedef struct CPUHotplugFeatures {
bool acpi_1_compatible;
bool has_legacy_cphp;
+ const char *smi_path;
} CPUHotplugFeatures;
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,