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| author | Tim Lee <timlee660101@gmail.com> | 2025-04-28 10:29:34 +0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-05-06 15:01:22 +0100 |
| commit | 97cdd1b0a7a010702a1d118b74c3af3bb2edb35c (patch) | |
| tree | 9711ee4e8b6be169e40277176275fa1a1da65524 | |
| parent | a9e0c9c0f14e19d23443ac24c8080b4708d2eab8 (diff) | |
| download | qemu-97cdd1b0a7a010702a1d118b74c3af3bb2edb35c.zip qemu-97cdd1b0a7a010702a1d118b74c3af3bb2edb35c.tar.gz qemu-97cdd1b0a7a010702a1d118b74c3af3bb2edb35c.tar.bz2 | |
hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.
Cc: qemu-stable@nongnu.org
Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board")
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Message-id: 20250428022934.3081139-1-timlee660101@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/arm/npcm8xx_boards.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c index 9d9f6d0..3bf3e1f 100644 --- a/hw/arm/npcm8xx_boards.c +++ b/hw/arm/npcm8xx_boards.c @@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc = MACHINE_CLASS(oc); static const char * const valid_cpu_types[] = { - ARM_CPU_TYPE_NAME("cortex-a9"), + ARM_CPU_TYPE_NAME("cortex-a35"), NULL }; |