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authorNathan Froyd <froydnj@codesourcery.com>2009-12-11 09:29:20 -0800
committerAurelien Jarno <aurelien@aurel32.net>2009-12-13 21:01:33 +0100
commit91a759352623e4a3da969fa66626cc99241e9da2 (patch)
tree91c34993793945574cf7e86c122a3c0b044a1f8a
parentf1e00a9cf326acc1f2386a72525af8859852e1df (diff)
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target-mips: fix user-mode emulation startup
Running programs with the MIPS user-mode emulator fails during dynamic loading, as floating-point instructions are not enabled in in env->hflags. Move the code for doing so from fpu_init to cpu_reset so the MIPS_HFLAG_{FPU,F64} setting doesn't get clobbered by cpu_reset setting env->hflags to MIPS_HFLAG_UM. The same end can be achieved by swapping the ordering of fpu_init and cpu_reset in cpu_mips_init, but it seemed better to consolidate the CONFIG_USER_ONLY code into a single location. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-mips/translate.c8
-rw-r--r--target-mips/translate_init.c8
2 files changed, 8 insertions, 8 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index ff0e590..dfea6f6 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -9845,6 +9845,14 @@ void cpu_reset (CPUMIPSState *env)
env->hflags = MIPS_HFLAG_UM;
/* Enable access to the SYNCI_Step register. */
env->CP0_HWREna |= (1 << 1);
+ if (env->CP0_Config1 & (1 << CP0C1_FP)) {
+ env->hflags |= MIPS_HFLAG_FPU;
+ }
+#ifdef TARGET_MIPS64
+ if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
+ env->hflags |= MIPS_HFLAG_F64;
+ }
+#endif
#else
if (env->hflags & MIPS_HFLAG_BMASK) {
/* If the exception was raised from a delay slot,
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 6f50555..11bc47c 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -533,14 +533,6 @@ static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
env->fpus[i].fcr0 = def->CP1_fcr0;
memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu));
-#if defined(CONFIG_USER_ONLY)
- if (env->CP0_Config1 & (1 << CP0C1_FP))
- env->hflags |= MIPS_HFLAG_FPU;
-#ifdef TARGET_MIPS64
- if (env->active_fpu.fcr0 & (1 << FCR0_F64))
- env->hflags |= MIPS_HFLAG_F64;
-#endif
-#endif
}
static void mvp_init (CPUMIPSState *env, const mips_def_t *def)