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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-12 10:33:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:20 +0100 |
| commit | 8ecda75f721b0673e9ad1420198a4f4ec3ae2cb9 (patch) | |
| tree | 1299ca57dd869788fefa27e14e43478fd67c670f | |
| parent | a861b3e94eb62495c0e3caac8ef2fb0ce4400a95 (diff) | |
| download | qemu-8ecda75f721b0673e9ad1420198a4f4ec3ae2cb9.zip qemu-8ecda75f721b0673e9ad1420198a4f4ec3ae2cb9.tar.gz qemu-8ecda75f721b0673e9ad1420198a4f4ec3ae2cb9.tar.bz2 | |
hw/arm/stellaris: Wire sysclk up to armv7m
Connect the sysclk to the armv7m object. This board's SoC does not
connect up the systick reference clock, so we don't need to connect a
refclk.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alexandre Iooss <erdnaxe@crans.org>
Message-id: 20210812093356.1946-18-peter.maydell@linaro.org
| -rw-r--r-- | hw/arm/stellaris.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index bf24abd..8c8bd39 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1322,7 +1322,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) DeviceState *ssys_dev; int i; int j; - uint8_t *macaddr; + const uint8_t *macaddr; MemoryRegion *sram = g_new(MemoryRegion, 1); MemoryRegion *flash = g_new(MemoryRegion, 1); @@ -1364,6 +1364,9 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); qdev_prop_set_bit(nvic, "enable-bitband", true); + qdev_connect_clock_in(nvic, "cpuclk", + qdev_get_clock_out(ssys_dev, "SYSCLK")); + /* This SoC does not connect the systick reference clock */ object_property_set_link(OBJECT(nvic), "memory", OBJECT(get_system_memory()), &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ |