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authorPeter Maydell <peter.maydell@linaro.org>2019-03-28 10:47:50 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-04-09 13:29:32 +0100
commit8cb2ca3d7479748587313f0b34034a3f8aa08c92 (patch)
treeea526cd781cb244789b8c0ce639c7243ee79abfb
parent120cba7ff13d61a60366d314d265f5a9b8faae8a (diff)
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target/i386: Generate #UD for LOCK on a register increment
Fix a TCG crash due to attempting an atomic increment operation without having set up the address first. This is a similar case to that dealt with in commit e84fcd7f662a0d8198703, and we fix it in the same way. Fixes: https://bugs.launchpad.net/qemu/+bug/1807675 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20190328104750.25046-1-peter.maydell@linaro.org
-rw-r--r--target/i386/translate.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 49cd298..b725bec 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -1398,6 +1398,11 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d)
static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c)
{
if (s1->prefix & PREFIX_LOCK) {
+ if (d != OR_TMP0) {
+ /* Lock prefix when destination is not memory */
+ gen_illegal_opcode(s1);
+ return;
+ }
tcg_gen_movi_tl(s1->T0, c > 0 ? 1 : -1);
tcg_gen_atomic_add_fetch_tl(s1->T0, s1->A0, s1->T0,
s1->mem_index, ot | MO_LE);