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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-23 16:15:35 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-04-25 12:59:09 +0200 |
| commit | 8b54467fb61eb507651ea8be6d786b0f2b0a1524 (patch) | |
| tree | 5307b6d9d7f7eca5fd1b69c4e63b870ec6b0b7aa | |
| parent | 53c895fbb2d31b0de6a04a6f7e86e17b48324dc8 (diff) | |
| download | qemu-8b54467fb61eb507651ea8be6d786b0f2b0a1524.zip qemu-8b54467fb61eb507651ea8be6d786b0f2b0a1524.tar.gz qemu-8b54467fb61eb507651ea8be6d786b0f2b0a1524.tar.bz2 | |
target/sparc: Register CPUClass:list_cpus
Register sparc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-5-philmd@linaro.org>
| -rw-r--r-- | target/sparc/cpu.c | 3 | ||||
| -rw-r--r-- | target/sparc/cpu.h | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index f7d231c..174b76f 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -580,7 +580,7 @@ static void print_features(uint32_t features, const char *prefix) } } -void sparc_cpu_list(void) +static void sparc_cpu_list(void) { unsigned int i; @@ -1057,6 +1057,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = sparc_cpu_class_by_name; + cc->list_cpus = sparc_cpu_list, cc->parse_features = sparc_cpu_parse_features; cc->dump_state = sparc_cpu_dump_state; #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 83ac818..37fd1e0 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -595,7 +595,6 @@ G_NORETURN void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t); /* cpu_init.c */ void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); -void sparc_cpu_list(void); /* mmu_helper.c */ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, @@ -666,8 +665,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, #define CPU_RESOLVING_TYPE TYPE_SPARC_CPU -#define cpu_list sparc_cpu_list - /* MMU modes definitions */ #if defined (TARGET_SPARC64) #define MMU_USER_IDX 0 |