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| author | WANG Rui <wangrui@loongson.cn> | 2025-04-18 16:21:02 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2025-04-24 10:46:31 +0800 |
| commit | 875caabdb1701a7c57ad0655a7963d74afc1b4d9 (patch) | |
| tree | 4f77d70f69a7c2c11105dbbcbd592f28083adce4 | |
| parent | 256df51e727235b3d5e937ca2784c45663c00f59 (diff) | |
| download | qemu-875caabdb1701a7c57ad0655a7963d74afc1b4d9.zip qemu-875caabdb1701a7c57ad0655a7963d74afc1b4d9.tar.gz qemu-875caabdb1701a7c57ad0655a7963d74afc1b4d9.tar.bz2 | |
target/loongarch: Guard BCEQZ/BCNEZ instructions with FP feature
The BCEQZ and BCNEZ instructions depend on access to condition codes
from floating-point comparisons. Previously, these instructions were
unconditionally enabled for 64-bit targets.
This patch updates their translation to be gated under the `FP` feature
flag instead, ensuring they are only available when the floating-point
unit is present.
This improves correctness for CPUs lacking floating-point support.
Signed-off-by: WANG Rui <wangrui@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20250418082103.447780-3-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
| -rw-r--r-- | target/loongarch/tcg/insn_trans/trans_branch.c.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/loongarch/tcg/insn_trans/trans_branch.c.inc b/target/loongarch/tcg/insn_trans/trans_branch.c.inc index 221e515..f94c1f3 100644 --- a/target/loongarch/tcg/insn_trans/trans_branch.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_branch.c.inc @@ -80,5 +80,5 @@ TRANS(bltu, ALL, gen_rr_bc, TCG_COND_LTU) TRANS(bgeu, ALL, gen_rr_bc, TCG_COND_GEU) TRANS(beqz, ALL, gen_rz_bc, TCG_COND_EQ) TRANS(bnez, ALL, gen_rz_bc, TCG_COND_NE) -TRANS(bceqz, 64, gen_cz_bc, TCG_COND_EQ) -TRANS(bcnez, 64, gen_cz_bc, TCG_COND_NE) +TRANS(bceqz, FP, gen_cz_bc, TCG_COND_EQ) +TRANS(bcnez, FP, gen_cz_bc, TCG_COND_NE) |