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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-11 15:31:08 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:31:08 +0000 |
| commit | 8704c753e8fe3155e22244f2c23e253a73aa4565 (patch) | |
| tree | 603869d2f07c7edb34616f5d8f8ddfd0f1ae86b5 | |
| parent | 229416c67e8faed47dfa1d26777e71df2cc3b320 (diff) | |
| download | qemu-8704c753e8fe3155e22244f2c23e253a73aa4565.zip qemu-8704c753e8fe3155e22244f2c23e253a73aa4565.tar.gz qemu-8704c753e8fe3155e22244f2c23e253a73aa4565.tar.bz2 | |
softfloat: Pad array size in pick_nan_muladd
While all indices into val[] should be in [0-2], the mask
applied is two bits. To help static analysis see there is
no possibility of read beyond the end of the array, pad the
array to 4 entries, with the final being (implicitly) NULL.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20241203203949.483774-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | fpu/softfloat-parts.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index 525db61..5fcdbc8 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -106,7 +106,7 @@ static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b, } ret = c; } else { - FloatPartsN *val[3] = { a, b, c }; + FloatPartsN *val[R_3NAN_1ST_MASK + 1] = { a, b, c }; Float3NaNPropRule rule = s->float_3nan_prop_rule; assert(rule != float_3nan_prop_none); |