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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:31:08 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:31:08 +0000 |
| commit | 86bb2f44cd6f4a45132beffcdacdf3b43d836042 (patch) | |
| tree | b2b976f18952afd164314dcf49ec8a70f03837a0 | |
| parent | d921f8fd56f144557413f8e3e35e4c12064e4091 (diff) | |
| download | qemu-86bb2f44cd6f4a45132beffcdacdf3b43d836042.zip qemu-86bb2f44cd6f4a45132beffcdacdf3b43d836042.tar.gz qemu-86bb2f44cd6f4a45132beffcdacdf3b43d836042.tar.bz2 | |
fpu: Remove default handling for dnan_pattern
Now that all our targets have bene converted to explicitly specify
their pattern for the default NaN value we can remove the remaining
fallback code in parts64_default_nan().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-55-peter.maydell@linaro.org
| -rw-r--r-- | fpu/softfloat-specialize.c.inc | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 5954a62..e075c47 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -135,20 +135,6 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status) uint64_t frac; uint8_t dnan_pattern = status->default_nan_pattern; - if (dnan_pattern == 0) { - /* - * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, - * S390, SH4, TriCore, and Xtensa. Our other supported targets - * do not have floating-point. - */ - if (snan_bit_is_one(status)) { - /* sign bit clear, set all frac bits other than msb */ - dnan_pattern = 0b00111111; - } else { - /* sign bit clear, set frac msb */ - dnan_pattern = 0b01000000; - } - } assert(dnan_pattern != 0); sign = dnan_pattern >> 7; |