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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-18 02:08:55 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:17 -0700 |
| commit | 867878c112a0c8bbf7590a948ea291f1f1d61209 (patch) | |
| tree | d055dbed8588d643287e95dfff4b39b4c0094b16 | |
| parent | 6ed4d97ff7fbd2ef3d0d3f1f06d89560955873b8 (diff) | |
| download | qemu-867878c112a0c8bbf7590a948ea291f1f1d61209.zip qemu-867878c112a0c8bbf7590a948ea291f1f1d61209.tar.gz qemu-867878c112a0c8bbf7590a948ea291f1f1d61209.tar.bz2 | |
target/tricore: Use tcg_gen_addcio_i32 for gen_addc_CC
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/tricore/translate.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index ede0c92..ba36c9f 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -1346,15 +1346,11 @@ static inline void gen_addi_CC(TCGv ret, TCGv r1, int32_t con) static inline void gen_addc_CC(TCGv ret, TCGv r1, TCGv r2) { - TCGv carry = tcg_temp_new_i32(); - TCGv t0 = tcg_temp_new_i32(); + TCGv t0 = tcg_temp_new_i32(); TCGv result = tcg_temp_new_i32(); - tcg_gen_movi_tl(t0, 0); - tcg_gen_setcondi_tl(TCG_COND_NE, carry, cpu_PSW_C, 0); /* Addition, carry and set C/V/SV bits */ - tcg_gen_add2_i32(result, cpu_PSW_C, r1, t0, carry, t0); - tcg_gen_add2_i32(result, cpu_PSW_C, result, cpu_PSW_C, r2, t0); + tcg_gen_addcio_i32(result, cpu_PSW_C, r1, r2, cpu_PSW_C); /* calc V bit */ tcg_gen_xor_tl(cpu_PSW_V, result, r1); tcg_gen_xor_tl(t0, r1, r2); |