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authorAleksandar Markovic <amarkovic@wavecomp.com>2019-02-12 18:01:44 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-02-14 17:47:37 +0100
commit85c2a393005656e9712959ca95c9be1e9aee4629 (patch)
tree4e581f3c449bd3d1e8e452b6c8871a210d76e644
parent08857c882d1da40793c3be27ae78cb3752902856 (diff)
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tests/tcg: target/mips: Add wrappers for MSA bit counting instructions
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
-rw-r--r--tests/tcg/mips/include/wrappers_msa.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h
new file mode 100644
index 0000000..8f8d00b
--- /dev/null
+++ b/tests/tcg/mips/include/wrappers_msa.h
@@ -0,0 +1,57 @@
+/*
+ * Header file for wrappers around MSA instructions assembler invocations
+ *
+ * Copyright (C) 2018 Wave Computing, Inc.
+ * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <https://www.gnu.org/licenses/>.
+ *
+ */
+
+#ifndef WRAPPERS_MSA_H
+#define WRAPPERS_MSA_H
+
+
+#define DO_MSA__WD__WS(suffix, mnemonic) \
+static inline void do_msa_##suffix(void *input, void *output) \
+{ \
+ __asm__ volatile ( \
+ "move $t0, %0\n\t" \
+ "ld.d $w11, 0($t0)\n\t" \
+ #mnemonic " $w10, $w11\n\t" \
+ "move $t0, %1\n\t" \
+ "st.d $w10, 0($t0)\n\t" \
+ : \
+ : "r" (input), "r" (output) \
+ : "t0", "memory" \
+ ); \
+}
+
+DO_MSA__WD__WS(NLOC_B, nloc.b)
+DO_MSA__WD__WS(NLOC_H, nloc.h)
+DO_MSA__WD__WS(NLOC_W, nloc.w)
+DO_MSA__WD__WS(NLOC_D, nloc.d)
+
+DO_MSA__WD__WS(NLZC_B, nlzc.b)
+DO_MSA__WD__WS(NLZC_H, nlzc.h)
+DO_MSA__WD__WS(NLZC_W, nlzc.w)
+DO_MSA__WD__WS(NLZC_D, nlzc.d)
+
+DO_MSA__WD__WS(PCNT_B, pcnt.b)
+DO_MSA__WD__WS(PCNT_H, pcnt.h)
+DO_MSA__WD__WS(PCNT_W, pcnt.w)
+DO_MSA__WD__WS(PCNT_D, pcnt.d)
+
+
+#endif