diff options
| author | Anton Johansson <anjo@rev.ng> | 2024-01-19 15:39:59 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-01-29 07:06:03 +1000 |
| commit | 85c19af63e7d1070062e5513bfcab223b93653f3 (patch) | |
| tree | 17676b39a46a95367375325751331e5fdbea6c90 | |
| parent | 32f0c394bbf7fb2be635658cbf84c72a124720a0 (diff) | |
| download | qemu-85c19af63e7d1070062e5513bfcab223b93653f3.zip qemu-85c19af63e7d1070062e5513bfcab223b93653f3.tar.gz qemu-85c19af63e7d1070062e5513bfcab223b93653f3.tar.bz2 | |
include/exec: Use vaddr in DisasContextBase for virtual addresses
Updates target/ QEMU_LOG macros to use VADDR_PRIx for printing updated
DisasContextBase fields.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20240119144024.14289-10-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | include/exec/translator.h | 6 | ||||
| -rw-r--r-- | target/hexagon/translate.c | 3 | ||||
| -rw-r--r-- | target/m68k/translate.c | 2 | ||||
| -rw-r--r-- | target/mips/tcg/translate.c | 12 | ||||
| -rw-r--r-- | target/mips/tcg/translate.h | 3 |
5 files changed, 14 insertions, 12 deletions
diff --git a/include/exec/translator.h b/include/exec/translator.h index b0412ea..51624fe 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -79,8 +79,8 @@ typedef enum DisasJumpType { */ typedef struct DisasContextBase { TranslationBlock *tb; - target_ulong pc_first; - target_ulong pc_next; + vaddr pc_first; + vaddr pc_next; DisasJumpType is_jmp; int num_insns; int max_insns; @@ -235,7 +235,7 @@ void translator_fake_ldb(uint8_t insn8, abi_ptr pc); * Translators can use this to enforce the rule that only single-insn * translation blocks are allowed to cross page boundaries. */ -static inline bool is_same_page(const DisasContextBase *db, target_ulong addr) +static inline bool is_same_page(const DisasContextBase *db, vaddr addr) { return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0; } diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index a14211c..f163eef 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -234,7 +234,8 @@ static int read_packet_words(CPUHexagonState *env, DisasContext *ctx, g_assert(ctx->base.num_insns == 1); } - HEX_DEBUG_LOG("decode_packet: pc = 0x%x\n", ctx->base.pc_next); + HEX_DEBUG_LOG("decode_packet: pc = 0x%" VADDR_PRIx "\n", + ctx->base.pc_next); HEX_DEBUG_LOG(" words = { "); for (int i = 0; i < nwords; i++) { HEX_DEBUG_LOG("0x%x, ", words[i]); diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5ec88c5..f886190 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1457,7 +1457,7 @@ DISAS_INSN(undef) * for the 680x0 series, as well as those that are implemented * but actually illegal for CPU32 or pre-68020. */ - qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x\n", + qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %" VADDR_PRIx "\n", insn, s->base.pc_next); gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); } diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index e102327..12094cc 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -4585,8 +4585,8 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" - TARGET_FMT_lx "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); goto out; @@ -9061,8 +9061,8 @@ static void gen_compute_branch1_r6(DisasContext *ctx, uint32_t op, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; @@ -11274,8 +11274,8 @@ static void gen_compute_compact_branch(DisasContext *ctx, uint32_t opc, if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index cffcfea..93a78b8 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -202,7 +202,8 @@ extern TCGv bcond; do { \ if (MIPS_DEBUG_DISAS) { \ qemu_log_mask(CPU_LOG_TB_IN_ASM, \ - TARGET_FMT_lx ": %08x Invalid %s %03x %03x %03x\n", \ + "%016" VADDR_PRIx \ + ": %08x Invalid %s %03x %03x %03x\n", \ ctx->base.pc_next, ctx->opcode, op, \ ctx->opcode >> 26, ctx->opcode & 0x3F, \ ((ctx->opcode >> 16) & 0x1F)); \ |