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| author | David Gibson <david@gibson.dropbear.id.au> | 2018-05-01 16:22:49 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-05-04 15:00:37 +1000 |
| commit | 84369f639ec0ae08b5238f9abe383e8cd4998e98 (patch) | |
| tree | cb55d0400694075628ce16530348584303e4fc0a | |
| parent | 982489180b72a41f008bbcf761ba1ed3f5f916ba (diff) | |
| download | qemu-84369f639ec0ae08b5238f9abe383e8cd4998e98.zip qemu-84369f639ec0ae08b5238f9abe383e8cd4998e98.tar.gz qemu-84369f639ec0ae08b5238f9abe383e8cd4998e98.tar.bz2 | |
spapr: Make a helper to set up cpu entry point state
Under PAPR, only the boot CPU is active when the system starts. Other cpus
must be explicitly activated using an RTAS call. The entry state for the
boot and secondary cpus isn't identical, but it has some things in common.
We're going to add a bit more common setup later, too, so to simplify
make a helper which sets up the common entry state for both boot and
secondary cpu threads.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
| -rw-r--r-- | hw/ppc/spapr.c | 4 | ||||
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 9 | ||||
| -rw-r--r-- | hw/ppc/spapr_rtas.c | 6 | ||||
| -rw-r--r-- | include/hw/ppc/spapr_cpu_core.h | 3 |
4 files changed, 15 insertions, 7 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index ed9b6a9..535d827 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1668,10 +1668,8 @@ static void spapr_machine_reset(void) g_free(fdt); /* Set up the entry state */ - first_ppc_cpu->env.gpr[3] = fdt_addr; + spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); first_ppc_cpu->env.gpr[5] = 0; - first_cpu->halted = 0; - first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT; spapr->cas_reboot = false; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 01dbc69..a98c7b0 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -52,6 +52,15 @@ static void spapr_cpu_reset(void *opaque) } +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r3) +{ + CPUPPCState *env = &cpu->env; + + env->nip = nip; + env->gpr[3] = r3; + CPU(cpu)->halted = 0; +} + static void spapr_cpu_destroy(PowerPCCPU *cpu) { qemu_unregister_reset(spapr_cpu_reset, cpu); diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index df07344..840d198 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -37,6 +37,7 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/ppc/spapr_rtas.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/ppc.h" #include "hw/boards.h" @@ -173,10 +174,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, sPAPRMachineState *spapr, */ newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset; - env->nip = start; - env->gpr[3] = r3; - - CPU(newcpu)->halted = 0; + spapr_cpu_set_entry_state(newcpu, start, r3); qemu_cpu_kick(CPU(newcpu)); diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 1129f34..47dcfda 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -12,6 +12,7 @@ #include "hw/qdev.h" #include "hw/cpu/core.h" #include "target/ppc/cpu-qom.h" +#include "target/ppc/cpu.h" #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" #define SPAPR_CPU_CORE(obj) \ @@ -38,4 +39,6 @@ typedef struct sPAPRCPUCoreClass { } sPAPRCPUCoreClass; const char *spapr_get_cpu_core_type(const char *cpu_type); +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r3); + #endif |