aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2014-01-13 10:26:16 +0000
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-01-14 10:09:04 +1000
commit83e6813a93e38976391b8c382c3375e3e188df3e (patch)
tree648f23820292d5e0fb8cf9142f56cd3c00569e1b
parentb54f18ba3415c731f0b069f6df56f529997fb74e (diff)
downloadqemu-83e6813a93e38976391b8c382c3375e3e188df3e.zip
qemu-83e6813a93e38976391b8c382c3375e3e188df3e.tar.gz
qemu-83e6813a93e38976391b8c382c3375e3e188df3e.tar.bz2
target-arm: Switch ARMCPUInfo arrays to use terminator entries
Switch the ARMCPUInfo arrays in cpu.c and cpu64.c to use a terminator entry rather than looping based on ARRAY_SIZE. The latter causes compile warnings on some versions of gcc if the configure options happen to result in an empty array. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
-rw-r--r--target-arm/cpu.c9
-rw-r--r--target-arm/cpu64.c15
2 files changed, 12 insertions, 12 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 408d207..c77a16c 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -980,6 +980,7 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "any", .initfn = arm_any_initfn },
#endif
#endif
+ { .name = NULL }
};
static Property arm_cpu_properties[] = {
@@ -1043,11 +1044,13 @@ static const TypeInfo arm_cpu_type_info = {
static void arm_cpu_register_types(void)
{
- int i;
+ const ARMCPUInfo *info = arm_cpus;
type_register_static(&arm_cpu_type_info);
- for (i = 0; i < ARRAY_SIZE(arm_cpus); i++) {
- cpu_register(&arm_cpus[i]);
+
+ while (info->name) {
+ cpu_register(info);
+ info++;
}
}
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index 60acd24..a639c2e 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -58,7 +58,7 @@ static const ARMCPUInfo aarch64_cpus[] = {
#ifdef CONFIG_USER_ONLY
{ .name = "any", .initfn = aarch64_any_initfn },
#endif
- { .name = NULL } /* TODO: drop when we support more CPUs */
+ { .name = NULL }
};
static void aarch64_cpu_initfn(Object *obj)
@@ -101,11 +101,6 @@ static void aarch64_cpu_register(const ARMCPUInfo *info)
.class_init = info->class_init,
};
- /* TODO: drop when we support more CPUs - all entries will have name set */
- if (!info->name) {
- return;
- }
-
type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
type_register(&type_info);
g_free((void *)type_info.name);
@@ -124,11 +119,13 @@ static const TypeInfo aarch64_cpu_type_info = {
static void aarch64_cpu_register_types(void)
{
- int i;
+ const ARMCPUInfo *info = aarch64_cpus;
type_register_static(&aarch64_cpu_type_info);
- for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
- aarch64_cpu_register(&aarch64_cpus[i]);
+
+ while (info->name) {
+ aarch64_cpu_register(info);
+ info++;
}
}