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authorBernhard Beschow <shentey@gmail.com>2023-10-07 14:38:25 +0200
committerMichael S. Tsirkin <mst@redhat.com>2023-10-22 05:18:17 -0400
commit80ec6f5b574e5368007d8076fd32316765bf4ffb (patch)
treee98c1b4995d5b051cfa0291a799af75f0188a786
parentde710ac40867a409d5e3fbd83940ce9e1f6922d7 (diff)
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hw/isa/piix4: Rename reset control operations to match PIIX3
Both implementations are the same and will be shared upon merging. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231007123843.127151-18-shentey@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/isa/piix4.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 9c8b6c9..eb45662 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -148,8 +148,8 @@ static void piix4_request_i8259_irq(void *opaque, int irq, int level)
qemu_set_irq(s->cpu_intr, level);
}
-static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
- unsigned int len)
+static void rcr_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned int len)
{
PIIX4State *s = opaque;
@@ -161,16 +161,16 @@ static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
s->rcr = val & 2; /* keep System Reset type only */
}
-static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
+static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned int len)
{
PIIX4State *s = opaque;
return s->rcr;
}
-static const MemoryRegionOps piix4_rcr_ops = {
- .read = piix4_rcr_read,
- .write = piix4_rcr_write,
+static const MemoryRegionOps rcr_ops = {
+ .read = rcr_read,
+ .write = rcr_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
.min_access_size = 1,
@@ -194,7 +194,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
"intr", 1);
- memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
+ memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s,
"reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev),
PIIX_RCR_IOPORT, &s->rcr_mem, 1);