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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-08-13 12:05:42 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-08-20 00:38:48 +0200
commit7ce9760d64e8a884f044f95a1f32f96c2e0fafa0 (patch)
tree70d5d523103919afac5341adc8c63e1792e587da
parent453ba4f675f751fe4dceaff57ac1ebf72f28f6d0 (diff)
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target/mips: Use correct MMU index in get_pte()
When refactoring page_table_walk_refill() in commit 4e999bf419 we missed the indirect call to cpu_mmu_index() in get_pte(): page_table_walk_refill() -> get_pte() -> cpu_ld[lq]_code() -> cpu_mmu_index() Since we don't mask anymore the modes in hflags, cpu_mmu_index() can return UM or SM, while we only expect KM or ERL. Fix by propagating ptw_mmu_idx to get_pte(), and use the cpu_ld/st_code_mmu() API with the correct MemOpIdx. Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reported-by: Waldemar Brodkorb <wbx@uclibc-ng.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2470 Fixes: 4e999bf419 ("target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240814090452.2591-3-philmd@linaro.org>
-rw-r--r--target/mips/tcg/sysemu/tlb_helper.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c
index 60147ba..0e94e00 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -593,16 +593,21 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
*/
static bool get_pte(CPUMIPSState *env, uint64_t vaddr, MemOp op,
- uint64_t *pte)
+ uint64_t *pte, unsigned ptw_mmu_idx)
{
+ MemOpIdx oi;
+
if ((vaddr & (memop_size(op) - 1)) != 0) {
return false;
}
+
+ oi = make_memop_idx(op | MO_TE, ptw_mmu_idx);
if (op == MO_64) {
- *pte = cpu_ldq_code(env, vaddr);
+ *pte = cpu_ldq_code_mmu(env, vaddr, oi, 0);
} else {
- *pte = cpu_ldl_code(env, vaddr);
+ *pte = cpu_ldl_code_mmu(env, vaddr, oi, 0);
}
+
return true;
}
@@ -642,7 +647,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
/* wrong base address */
return 0;
}
- if (!get_pte(env, *vaddr, directory_mop, &entry)) {
+ if (!get_pte(env, *vaddr, directory_mop, &entry, ptw_mmu_idx)) {
return 0;
}
@@ -668,7 +673,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
ptw_mmu_idx) != TLBRET_MATCH) {
return 0;
}
- if (!get_pte(env, vaddr2, leaf_mop, &entry)) {
+ if (!get_pte(env, vaddr2, leaf_mop, &entry, ptw_mmu_idx)) {
return 0;
}
entry = get_tlb_entry_layout(env, entry, leaf_mop, pf_ptew);
@@ -823,7 +828,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
ptw_mmu_idx) != TLBRET_MATCH) {
return false;
}
- if (!get_pte(env, vaddr, leaf_mop, &dir_entry)) {
+ if (!get_pte(env, vaddr, leaf_mop, &dir_entry, ptw_mmu_idx)) {
return false;
}
dir_entry = get_tlb_entry_layout(env, dir_entry, leaf_mop, pf_ptew);
@@ -835,7 +840,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
ptw_mmu_idx) != TLBRET_MATCH) {
return false;
}
- if (!get_pte(env, vaddr, leaf_mop, &dir_entry)) {
+ if (!get_pte(env, vaddr, leaf_mop, &dir_entry, ptw_mmu_idx)) {
return false;
}
dir_entry = get_tlb_entry_layout(env, dir_entry, leaf_mop, pf_ptew);