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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-13 17:56:21 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-04 11:03:54 -0700 |
| commit | 7857ee114c6518165653d3ba87f24a1815c26f6f (patch) | |
| tree | cef853de0a34cd94e09ec6a97a3303984133fea3 | |
| parent | 06ddecff244a7fbb2c98352cdfed44fea66608bc (diff) | |
| download | qemu-7857ee114c6518165653d3ba87f24a1815c26f6f.zip qemu-7857ee114c6518165653d3ba87f24a1815c26f6f.tar.gz qemu-7857ee114c6518165653d3ba87f24a1815c26f6f.tar.bz2 | |
tcg: Remove TCGContext.tlb_fast_offset
Now that there is no padding between CPUNegativeOffsetState
and CPUArchState, this value is constant across all targets.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | accel/tcg/translate-all.c | 2 | ||||
| -rw-r--r-- | include/tcg/tcg.h | 1 | ||||
| -rw-r--r-- | tcg/tcg.c | 15 |
3 files changed, 9 insertions, 9 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 6fac5b7..83e07b8 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -344,8 +344,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tcg_ctx->page_bits = TARGET_PAGE_BITS; tcg_ctx->page_mask = TARGET_PAGE_MASK; tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS; - tcg_ctx->tlb_fast_offset = (int)offsetof(ArchCPU, parent_obj.neg.tlb.f) - - (int)offsetof(ArchCPU, env); #endif tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS; #ifdef TCG_GUEST_DEFAULT_MO diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 3cdbeaf..7743868 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -489,7 +489,6 @@ struct TCGContext { TCGType addr_type; /* TCG_TYPE_I32 or TCG_TYPE_I64 */ #ifdef CONFIG_SOFTMMU - int tlb_fast_offset; int page_mask; uint8_t page_bits; uint8_t tlb_dyn_max_bits; @@ -406,7 +406,8 @@ static uintptr_t G_GNUC_UNUSED get_jmp_target_addr(TCGContext *s, int which) #if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER) static int tlb_mask_table_ofs(TCGContext *s, int which) { - return s->tlb_fast_offset + which * sizeof(CPUTLBDescFast); + return (offsetof(CPUNegativeOffsetState, tlb.f[which]) - + sizeof(CPUNegativeOffsetState)); } #endif @@ -734,6 +735,13 @@ static const TCGTargetOpDef constraint_sets[] = { #include "tcg-target.c.inc" +#ifndef CONFIG_TCG_INTERPRETER +/* Validate CPUTLBDescFast placement. */ +QEMU_BUILD_BUG_ON((int)(offsetof(CPUNegativeOffsetState, tlb.f[0]) - + sizeof(CPUNegativeOffsetState)) + < MIN_TLB_MASK_TABLE_OFS); +#endif + static void alloc_tcg_plugin_context(TCGContext *s) { #ifdef CONFIG_PLUGIN @@ -1497,11 +1505,6 @@ void tcg_func_start(TCGContext *s) tcg_debug_assert(s->addr_type == TCG_TYPE_I32 || s->addr_type == TCG_TYPE_I64); -#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER) - tcg_debug_assert(s->tlb_fast_offset < 0); - tcg_debug_assert(s->tlb_fast_offset >= MIN_TLB_MASK_TABLE_OFS); -#endif - tcg_debug_assert(s->insn_start_words > 0); } |