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| author | Nicholas Piggin <npiggin@gmail.com> | 2025-03-20 22:24:40 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-21 13:54:36 +1000 |
| commit | 73c0c904fc99e2ceecbbded84ec76d40d3f2daae (patch) | |
| tree | cfd072d27c75dc7d141f1c061ae3198de0492995 | |
| parent | 8defe9da08135d03e054f20cb8fea4389be96e18 (diff) | |
| download | qemu-73c0c904fc99e2ceecbbded84ec76d40d3f2daae.zip qemu-73c0c904fc99e2ceecbbded84ec76d40d3f2daae.tar.gz qemu-73c0c904fc99e2ceecbbded84ec76d40d3f2daae.tar.bz2 | |
target/ppc: Fix e200 duplicate SPRs
DSRR0/1 registers are in the BookE ISA not e200 specific, so
remove the duplicate e200 register definitions.
Cc: Roman Kapl <rka@sysgo.com>
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768
Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| -rw-r--r-- | target/ppc/cpu_init.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 8b590e7..7decc09 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -2744,14 +2744,6 @@ static void init_proc_e200(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); /* TOFIX */ - spr_register(env, SPR_BOOKE_DSRR0, "DSRR0", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - spr_register(env, SPR_BOOKE_DSRR1, "DSRR1", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); init_tlbs_emb(env); init_excp_e200(env, 0xFFFF0000UL); |