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author | Jamin Lin <jamin_lin@aspeedtech.com> | 2025-05-15 16:09:36 +0800 |
---|---|---|
committer | Cédric Le Goater <clg@redhat.com> | 2025-05-25 23:39:11 +0200 |
commit | 7328c48b57c97e13863fdc3a76d6d9c8fe07d6ae (patch) | |
tree | 75cb3c348f08d5a9a2edeca7c70416f92b0bb2fe | |
parent | fb8e59abbe46957cd599bb9aa9221fad1e4e989e (diff) | |
download | qemu-7328c48b57c97e13863fdc3a76d6d9c8fe07d6ae.zip qemu-7328c48b57c97e13863fdc3a76d6d9c8fe07d6ae.tar.gz qemu-7328c48b57c97e13863fdc3a76d6d9c8fe07d6ae.tar.bz2 |
hw/misc/aspeed_hace: Extract direct mode hash buffer setup into helper function
To improve code readability and maintainability of do_hash_operation(), this
commit introduces a new helper function: hash_prepare_direct_iov().
This function encapsulates the logic for setting up the I/O vector (iov)
in direct mode (non-scatter-gather).
No functional changes are introduced.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
-rw-r--r-- | hw/misc/aspeed_hace.c | 42 |
1 files changed, 32 insertions, 10 deletions
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index 1256926..42c6f29 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -142,6 +142,31 @@ static bool has_padding(AspeedHACEState *s, struct iovec *iov, return false; } +static int hash_prepare_direct_iov(AspeedHACEState *s, struct iovec *iov) +{ + uint32_t src; + void *haddr; + hwaddr plen; + int iov_idx; + + plen = s->regs[R_HASH_SRC_LEN]; + src = s->regs[R_HASH_SRC]; + haddr = address_space_map(&s->dram_as, src, &plen, false, + MEMTXATTRS_UNSPECIFIED); + if (haddr == NULL) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Unable to map address, addr=0x%x, " + "plen=0x%" HWADDR_PRIx "\n", + __func__, src, plen); + return -1; + } + + iov[0].iov_base = haddr; + iov[0].iov_len = plen; + iov_idx = 1; + + return iov_idx; +} static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, bool acc_mode) { @@ -169,6 +194,7 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, } } + /* Prepares the iov for hashing operations based on the selected mode */ if (sg_mode) { for (iov_idx = 0; !(len & SG_LIST_LEN_LAST); iov_idx++) { if (iov_idx == ASPEED_HACE_MAX_SG) { @@ -211,17 +237,13 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, } } } else { - plen = s->regs[R_HASH_SRC_LEN]; + iov_idx = hash_prepare_direct_iov(s, iov); + } - haddr = address_space_map(&s->dram_as, s->regs[R_HASH_SRC], - &plen, false, MEMTXATTRS_UNSPECIFIED); - if (haddr == NULL) { - qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__); - return; - } - iov[0].iov_base = haddr; - iov[0].iov_len = plen; - iov_idx = 1; + if (iov_idx <= 0) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Failed to prepare iov\n", __func__); + return; } if (acc_mode) { |