diff options
author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-27 11:26:09 +0100 |
---|---|---|
committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-11 22:43:31 +1000 |
commit | 720c2f2d53d45bae18cbc9eaa39b56c2f00fefb7 (patch) | |
tree | dfd11a70602c4b4c69315873248f0ec011031572 | |
parent | 0fc76338fe4f587cfe1f582ef0594b32690b7c48 (diff) | |
download | qemu-720c2f2d53d45bae18cbc9eaa39b56c2f00fefb7.zip qemu-720c2f2d53d45bae18cbc9eaa39b56c2f00fefb7.tar.gz qemu-720c2f2d53d45bae18cbc9eaa39b56c2f00fefb7.tar.bz2 |
target/ppc: Move ppc_ldl_code() to tcg-excp_helper.c
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-ID: <20250127102620.39159-6-philmd@linaro.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
-rw-r--r-- | target/ppc/excp_helper.c | 21 | ||||
-rw-r--r-- | target/ppc/tcg-excp_helper.c | 18 |
2 files changed, 18 insertions, 21 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index b05eb7f..8956466 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -136,27 +136,6 @@ static void dump_hcall(CPUPPCState *env) env->nip); } -#ifdef CONFIG_TCG -/* Return true iff byteswap is needed to load instruction */ -static inline bool insn_need_byteswap(CPUArchState *env) -{ - /* SYSTEM builds TARGET_BIG_ENDIAN. Need to swap when MSR[LE] is set */ - return !!(env->msr & ((target_ulong)1 << MSR_LE)); -} - -uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr) -{ - uint32_t insn = cpu_ldl_code(env, addr); - - if (insn_need_byteswap(env)) { - insn = bswap32(insn); - } - - return insn; -} - -#endif - static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp) { const char *es; diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 3402dbe..6950b78 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -199,4 +199,22 @@ bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp) return false; } +/* Return true iff byteswap is needed to load instruction */ +static inline bool insn_need_byteswap(CPUArchState *env) +{ + /* SYSTEM builds TARGET_BIG_ENDIAN. Need to swap when MSR[LE] is set */ + return !!(env->msr & ((target_ulong)1 << MSR_LE)); +} + +uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr) +{ + uint32_t insn = cpu_ldl_code(env, addr); + + if (insn_need_byteswap(env)) { + insn = bswap32(insn); + } + + return insn; +} + #endif /* !CONFIG_USER_ONLY */ |