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| author | Alexander Graf <agraf@suse.de> | 2011-04-30 23:34:56 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-05-12 00:24:51 +0200 |
| commit | 71afeb616534cb93d38ece73f2c4151e3ca4bc83 (patch) | |
| tree | bd382c6b1d327850f6139d3348cb1432571b7551 | |
| parent | 3b989d499e933626d09e0166b1fd7c8b8e1e65f2 (diff) | |
| download | qemu-71afeb616534cb93d38ece73f2c4151e3ca4bc83.zip qemu-71afeb616534cb93d38ece73f2c4151e3ca4bc83.tar.gz qemu-71afeb616534cb93d38ece73f2c4151e3ca4bc83.tar.bz2 | |
PPC: Add GS MSR definition
The BookE specification defines MSR bit 28 as Guest State. Add it
to the list of MSR macros.
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-ppc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 303f8ce..c6b2255 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -420,6 +420,7 @@ struct ppc_slb_t { #define MSR_CM 31 /* Computation mode for BookE hflags */ #define MSR_ICM 30 /* Interrupt computation mode for BookE */ #define MSR_THV 29 /* hypervisor state for 32 bits PowerPC hflags */ +#define MSR_GS 28 /* guest state for BookE */ #define MSR_UCLE 26 /* User-mode cache lock enable for BookE */ #define MSR_VR 25 /* altivec available x hflags */ #define MSR_SPE 25 /* SPE enable for BookE x hflags */ @@ -457,6 +458,7 @@ struct ppc_slb_t { #define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_icm ((env->msr >> MSR_ICM) & 1) #define msr_thv ((env->msr >> MSR_THV) & 1) +#define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_ucle ((env->msr >> MSR_UCLE) & 1) #define msr_vr ((env->msr >> MSR_VR) & 1) #define msr_spe ((env->msr >> MSR_SPE) & 1) |