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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-02-10 09:38:36 -0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-02-23 14:21:33 -0800 |
| commit | 718942aed69d42f0d982824b2469331ff77edcb2 (patch) | |
| tree | 048b46eb46e7533cd9d81c64c985eac8c1701214 | |
| parent | 90b1fafce0602d46243a40d8eea3006ef57e24d8 (diff) | |
| download | qemu-718942aed69d42f0d982824b2469331ff77edcb2.zip qemu-718942aed69d42f0d982824b2469331ff77edcb2.tar.gz qemu-718942aed69d42f0d982824b2469331ff77edcb2.tar.bz2 | |
target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
We have a RISCVCPU *cpu pointer available at the start of the function.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-ID: <20230210123836.506286-1-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | target/riscv/cpu_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index ad8d826..3a9472a 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, * which is not supported by GVEC. So we set vl_eq_vlmax flag to true * only when maxsz >= 8 bytes. */ - uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype); + uint32_t vlmax = vext_get_vlmax(cpu, env->vtype); uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW); uint32_t maxsz = vlmax << sew; bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) && |