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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-02-19 14:46:03 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-08 17:20:03 +0000 |
| commit | 6fe8acb41ed5a4b033ae7b5f876968e568476129 (patch) | |
| tree | 646a90c89b60a0261360a5b154f9cca2f3479577 | |
| parent | a459e849aa2b683fac20fc72db9b4b1d90a4b4b9 (diff) | |
| download | qemu-6fe8acb41ed5a4b033ae7b5f876968e568476129.zip qemu-6fe8acb41ed5a4b033ae7b5f876968e568476129.tar.gz qemu-6fe8acb41ed5a4b033ae7b5f876968e568476129.tar.bz2 | |
hw/arm/armsse: Add missing SSE-200 SYS_PPU
We forgot to implement a TYPE_UNIMPLEMENTED_DEVICE stub
for the SYS_PPU in the SSE-200, which is at 0x50022000.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-31-peter.maydell@linaro.org
| -rw-r--r-- | hw/arm/armsse.c | 9 | ||||
| -rw-r--r-- | include/hw/arm/armsse.h | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index f72d1ad..f43f052 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -321,6 +321,15 @@ static const ARMSSEDeviceInfo sse200_devices[] = { .irq = NO_IRQ, }, { + .name = "SYS_PPU", + .type = TYPE_UNIMPLEMENTED_DEVICE, + .index = 7, + .addr = 0x50022000, + .size = 0x1000, + .ppc = NO_PPC, + .irq = NO_IRQ, + }, + { .name = NULL, } }; diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index eb4e937..104ba8d 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -135,7 +135,7 @@ OBJECT_DECLARE_TYPE(ARMSSE, ARMSSEClass, #define SSE_MAX_CPUS 2 -#define NUM_PPUS 7 +#define NUM_PPUS 8 /* Number of CPU IRQs used by the SSE itself */ #define NUM_SSE_IRQS 32 |