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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
| commit | 6f759b179fd72a90fed129721dc28e04fa79d7c3 (patch) | |
| tree | bd075c2c6a2b0c0fd45234fa24691e2a9b82d4e2 | |
| parent | e494fe4909fd0e0d61b32af7a86050191187b60d (diff) | |
| download | qemu-6f759b179fd72a90fed129721dc28e04fa79d7c3.zip qemu-6f759b179fd72a90fed129721dc28e04fa79d7c3.tar.gz qemu-6f759b179fd72a90fed129721dc28e04fa79d7c3.tar.bz2 | |
target/ppc: Set FloatInfZeroNaNRule explicitly
Set the FloatInfZeroNaNRule explicitly for the PPC target,
so we can remove the ifdef from pickNaNMulAdd().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-8-peter.maydell@linaro.org
| -rw-r--r-- | fpu/softfloat-specialize.c.inc | 7 | ||||
| -rw-r--r-- | target/ppc/cpu_init.c | 7 |
2 files changed, 8 insertions, 6 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index db914dd..2023b2b 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -503,18 +503,13 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, */ rule = float_infzeronan_dnan_never; } -#elif defined(TARGET_PPC) || defined(TARGET_SPARC) || \ +#elif defined(TARGET_SPARC) || \ defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan) * case sets InvalidOp and returns the input value 'c' */ - /* - * For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer - * to return an input NaN if we have one (ie c) rather than generating - * a default NaN - */ rule = float_infzeronan_dnan_never; #endif } diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index efcb80d..f18908a 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7270,6 +7270,13 @@ static void ppc_cpu_reset_hold(Object *obj, ResetType type) */ set_float_2nan_prop_rule(float_2nan_prop_ab, &env->fp_status); set_float_2nan_prop_rule(float_2nan_prop_ab, &env->vec_status); + /* + * For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer + * to return an input NaN if we have one (ie c) rather than generating + * a default NaN + */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status); + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->vec_status); for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) { ppc_spr_t *spr = &env->spr_cb[i]; |