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| author | Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> | 2018-08-20 11:24:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-20 11:24:32 +0100 |
| commit | 6bfd06da6e3b293c9d7f561ea6afc857267c9ecd (patch) | |
| tree | 41f239f2b87e81a2ab8ad448fe9c21edd501ad36 | |
| parent | 22907d2b81c4702c0d226ad1364605dc9adac232 (diff) | |
| download | qemu-6bfd06da6e3b293c9d7f561ea6afc857267c9ecd.zip qemu-6bfd06da6e3b293c9d7f561ea6afc857267c9ecd.tar.gz qemu-6bfd06da6e3b293c9d7f561ea6afc857267c9ecd.tar.bz2 | |
sdhci: add i.MX SD Stable Clock bit
Add the ESDHC PRSSTAT_SDSTB bit, using the value of SDHC_CLOCK_INT_STABLE.
Freescale recommends checking this bit when changing clock frequency.
Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Message-id: 1534507843-4251-1-git-send-email-hans-erik.floryd@rt-labs.com
[PMM: fixed indentation]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/sd/sdhci-internal.h | 2 | ||||
| -rw-r--r-- | hw/sd/sdhci.c | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 756ef3f..19665fd 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -302,4 +302,6 @@ extern const VMStateDescription sdhci_vmstate; #define ESDHC_CTRL_4BITBUS (0x1 << 1) #define ESDHC_CTRL_8BITBUS (0x2 << 1) +#define ESDHC_PRNSTS_SDSTB (1 << 3) + #endif diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 8f58c31..81bbf03 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1651,6 +1651,14 @@ static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size) break; + case SDHC_PRNSTS: + /* Add SDSTB (SD Clock Stable) bit to PRNSTS */ + ret = sdhci_read(opaque, offset, size) & ~ESDHC_PRNSTS_SDSTB; + if (s->clkcon & SDHC_CLOCK_INT_STABLE) { + ret |= ESDHC_PRNSTS_SDSTB; + } + break; + case ESDHC_DLL_CTRL: case ESDHC_TUNE_CTRL_STATUS: case ESDHC_UNDOCUMENTED_REG27: |