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| author | Shivaprasad G Bhat <sbhat@linux.ibm.com> | 2023-05-04 05:35:39 -0400 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-05-05 12:34:22 -0300 |
| commit | 6a5d81b17201ab8a95539bad94c8a6c08a42e076 (patch) | |
| tree | b917b3a91f7d71a512d683be223cc721b543f004 | |
| parent | fcdae0122de602e95f198731b834b7067ad05e1f (diff) | |
| download | qemu-6a5d81b17201ab8a95539bad94c8a6c08a42e076.zip qemu-6a5d81b17201ab8a95539bad94c8a6c08a42e076.tar.gz qemu-6a5d81b17201ab8a95539bad94c8a6c08a42e076.tar.bz2 | |
tcg: ppc64: Fix mask generation for vextractdm
In function do_extractm() the mask is calculated as
dup_const(1 << (element_width - 1)). '1' being signed int
works fine for MO_8,16,32. For MO_64, on PPC64 host
this ends up becoming 0 on compilation. The vextractdm
uses MO_64, and it ends up having mask as 0.
Explicitly use 1ULL instead of signed int 1 like its
used everywhere else.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1536
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <168319292809.1159309.5817546227121323288.stgit@ltc-boston1.aus.stglabs.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| -rw-r--r-- | target/ppc/translate/vmx-impl.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 112233b..c8712dd 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -2058,7 +2058,7 @@ static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb *a) static bool do_vextractm(DisasContext *ctx, arg_VX_tb *a, unsigned vece) { const uint64_t elem_width = 8 << vece, elem_count_half = 8 >> vece, - mask = dup_const(vece, 1 << (elem_width - 1)); + mask = dup_const(vece, 1ULL << (elem_width - 1)); uint64_t i, j; TCGv_i64 lo, hi, t0, t1; |