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author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-18 02:03:03 -0800 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:17 -0700 |
commit | 68188214d5b5dc80acc9143f6bdca25fc06f6e2b (patch) | |
tree | fc2143c4284f9188ae92d0f64ed5a762505f2bc7 | |
parent | 206c23e4720cd2b7668197887d1694bd346e979e (diff) | |
download | qemu-68188214d5b5dc80acc9143f6bdca25fc06f6e2b.zip qemu-68188214d5b5dc80acc9143f6bdca25fc06f6e2b.tar.gz qemu-68188214d5b5dc80acc9143f6bdca25fc06f6e2b.tar.bz2 |
target/sh4: Use tcg_gen_addcio_i32 for addc
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | target/sh4/translate.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 712a57f..712117b 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -695,14 +695,8 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_add_i32(REG(B11_8), REG(B11_8), REG(B7_4)); return; case 0x300e: /* addc Rm,Rn */ - { - TCGv t0, t1; - t0 = tcg_constant_tl(0); - t1 = tcg_temp_new(); - tcg_gen_add2_i32(t1, cpu_sr_t, cpu_sr_t, t0, REG(B7_4), t0); - tcg_gen_add2_i32(REG(B11_8), cpu_sr_t, - REG(B11_8), t0, t1, cpu_sr_t); - } + tcg_gen_addcio_i32(REG(B11_8), cpu_sr_t, + REG(B11_8), REG(B7_4), cpu_sr_t); return; case 0x300f: /* addv Rm,Rn */ { |