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authorTaylor Simpson <tsimpson@quicinc.com>2021-03-04 09:37:05 -0800
committerRichard Henderson <richard.henderson@linaro.org>2021-03-06 17:35:43 -0800
commit66a1807b8e384145664ccc98e432901c4df33f4e (patch)
treecc4e84ca0034080a4b10c90720953927f84e7c3d
parentb33311c67033849f31856d19f8e7252a77ea9216 (diff)
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target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR
Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros") Eliminate the following Coverity CIDs (Bad bit shift operation) 325227 325292 325425 325526 325561 325564 325578 325637 325736 325748 325786 325815 325837 Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1614879425-9259-1-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/hexagon/macros.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index 78c4efb..cfcb817 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon/macros.h
@@ -459,7 +459,7 @@ static inline void gen_logical_not(TCGv dest, TCGv src)
: (fCAST##REGSTYPE##s(SRC) >> (SHAMT)))
#define fASHIFTR(SRC, SHAMT, REGSTYPE) (fCAST##REGSTYPE##s(SRC) >> (SHAMT))
#define fLSHIFTR(SRC, SHAMT, REGSTYPE) \
- (((SHAMT) >= 64) ? 0 : (fCAST##REGSTYPE##u(SRC) >> (SHAMT)))
+ (((SHAMT) >= (sizeof(SRC) * 8)) ? 0 : (fCAST##REGSTYPE##u(SRC) >> (SHAMT)))
#define fROTL(SRC, SHAMT, REGSTYPE) \
(((SHAMT) == 0) ? (SRC) : ((fCAST##REGSTYPE##u(SRC) << (SHAMT)) | \
((fCAST##REGSTYPE##u(SRC) >> \
@@ -469,7 +469,7 @@ static inline void gen_logical_not(TCGv dest, TCGv src)
((fCAST##REGSTYPE##u(SRC) << \
((sizeof(SRC) * 8) - (SHAMT))))))
#define fASHIFTL(SRC, SHAMT, REGSTYPE) \
- (((SHAMT) >= 64) ? 0 : (fCAST##REGSTYPE##s(SRC) << (SHAMT)))
+ (((SHAMT) >= (sizeof(SRC) * 8)) ? 0 : (fCAST##REGSTYPE##s(SRC) << (SHAMT)))
#ifdef QEMU_GENERATE
#define fLOAD(NUM, SIZE, SIGN, EA, DST) MEM_LOAD##SIZE##SIGN(DST, EA)