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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-07-27 16:56:47 +1000 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 12:40:11 +1000 |
commit | 65f2475f1f3b46086dfeef9ba882ea3d9d909d57 (patch) | |
tree | 8930396ad134c6568ddf52b923b79095c3790162 | |
parent | 5f2a6254522bd4cfb917822f678b117e6f005664 (diff) | |
download | qemu-65f2475f1f3b46086dfeef9ba882ea3d9d909d57.zip qemu-65f2475f1f3b46086dfeef9ba882ea3d9d909d57.tar.gz qemu-65f2475f1f3b46086dfeef9ba882ea3d9d909d57.tar.bz2 |
ppc: Use a helper to generate "LE unsupported" alignment interrupts
Some operations aren't allowed in LE mode, use a helper rather than
open coding the exception generation.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r-- | target-ppc/translate.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 5986435..1315656 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2427,6 +2427,12 @@ static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask) tcg_temp_free(t0); } +static inline void gen_align_no_le(DisasContext *ctx) +{ + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, + (ctx->opcode & 0x03FF0000) | POWERPC_EXCP_ALIGN_LE); +} + /*** Integer load ***/ static inline void gen_qemu_ld8u(DisasContext *ctx, TCGv arg1, TCGv arg2) { @@ -2647,10 +2653,9 @@ static void gen_lq(DisasContext *ctx) } if (!le_is_supported && ctx->le_mode) { - gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + gen_align_no_le(ctx); return; } - ra = rA(ctx->opcode); rd = rD(ctx->opcode); if (unlikely((rd & 1) || rd == ra)) { @@ -2781,7 +2786,7 @@ static void gen_std(DisasContext *ctx) } if (!le_is_supported && ctx->le_mode) { - gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + gen_align_no_le(ctx); return; } |