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authorJamin Lin <jamin_lin@aspeedtech.com>2025-03-07 11:59:18 +0800
committerCédric Le Goater <clg@redhat.com>2025-03-09 14:36:53 +0100
commit617cacefb7f7062f026994a256f8798d767cff73 (patch)
treeb1ff51dbbadbf6e5a0a7cb3e219cc92d40c3599b
parentde4e979973ce5c09d0b9a6d8a7aa17ab77c869c8 (diff)
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hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number
To improve readability, sort the IRQ table by IRQ number. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-10-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
-rw-r--r--hw/arm/aspeed_ast27x0.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 44ddfdd..642a8f5 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -74,27 +74,13 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
/* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
static const int aspeed_soc_ast2700a0_irqmap[] = {
- [ASPEED_DEV_UART0] = 132,
- [ASPEED_DEV_UART1] = 132,
- [ASPEED_DEV_UART2] = 132,
- [ASPEED_DEV_UART3] = 132,
- [ASPEED_DEV_UART4] = 8,
- [ASPEED_DEV_UART5] = 132,
- [ASPEED_DEV_UART6] = 132,
- [ASPEED_DEV_UART7] = 132,
- [ASPEED_DEV_UART8] = 132,
- [ASPEED_DEV_UART9] = 132,
- [ASPEED_DEV_UART10] = 132,
- [ASPEED_DEV_UART11] = 132,
- [ASPEED_DEV_UART12] = 132,
- [ASPEED_DEV_FMC] = 131,
[ASPEED_DEV_SDMC] = 0,
- [ASPEED_DEV_SCU] = 12,
- [ASPEED_DEV_ADC] = 130,
+ [ASPEED_DEV_HACE] = 4,
[ASPEED_DEV_XDMA] = 5,
- [ASPEED_DEV_EMMC] = 15,
- [ASPEED_DEV_GPIO] = 130,
+ [ASPEED_DEV_UART4] = 8,
+ [ASPEED_DEV_SCU] = 12,
[ASPEED_DEV_RTC] = 13,
+ [ASPEED_DEV_EMMC] = 15,
[ASPEED_DEV_TIMER1] = 16,
[ASPEED_DEV_TIMER2] = 17,
[ASPEED_DEV_TIMER3] = 18,
@@ -103,19 +89,33 @@ static const int aspeed_soc_ast2700a0_irqmap[] = {
[ASPEED_DEV_TIMER6] = 21,
[ASPEED_DEV_TIMER7] = 22,
[ASPEED_DEV_TIMER8] = 23,
- [ASPEED_DEV_WDT] = 131,
- [ASPEED_DEV_PWM] = 131,
+ [ASPEED_DEV_DP] = 28,
[ASPEED_DEV_LPC] = 128,
[ASPEED_DEV_IBT] = 128,
+ [ASPEED_DEV_KCS] = 128,
+ [ASPEED_DEV_ADC] = 130,
+ [ASPEED_DEV_GPIO] = 130,
[ASPEED_DEV_I2C] = 130,
- [ASPEED_DEV_PECI] = 133,
+ [ASPEED_DEV_FMC] = 131,
+ [ASPEED_DEV_WDT] = 131,
+ [ASPEED_DEV_PWM] = 131,
+ [ASPEED_DEV_I3C] = 131,
+ [ASPEED_DEV_UART0] = 132,
+ [ASPEED_DEV_UART1] = 132,
+ [ASPEED_DEV_UART2] = 132,
+ [ASPEED_DEV_UART3] = 132,
+ [ASPEED_DEV_UART5] = 132,
+ [ASPEED_DEV_UART6] = 132,
+ [ASPEED_DEV_UART7] = 132,
+ [ASPEED_DEV_UART8] = 132,
+ [ASPEED_DEV_UART9] = 132,
+ [ASPEED_DEV_UART10] = 132,
+ [ASPEED_DEV_UART11] = 132,
+ [ASPEED_DEV_UART12] = 132,
[ASPEED_DEV_ETH1] = 132,
[ASPEED_DEV_ETH2] = 132,
[ASPEED_DEV_ETH3] = 132,
- [ASPEED_DEV_HACE] = 4,
- [ASPEED_DEV_KCS] = 128,
- [ASPEED_DEV_DP] = 28,
- [ASPEED_DEV_I3C] = 131,
+ [ASPEED_DEV_PECI] = 133,
[ASPEED_DEV_SDHCI] = 133,
};