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| author | Cédric Le Goater <clg@redhat.com> | 2024-06-25 08:37:43 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-07-02 07:52:43 +0200 |
| commit | 61578d1e806d7271813c870e31160a7b21eab508 (patch) | |
| tree | 74e61c00335f921903a2abe29418dfa444968e70 | |
| parent | 56a37eda93edafabcc4de0184b88d082ede6dec1 (diff) | |
| download | qemu-61578d1e806d7271813c870e31160a7b21eab508.zip qemu-61578d1e806d7271813c870e31160a7b21eab508.tar.gz qemu-61578d1e806d7271813c870e31160a7b21eab508.tar.bz2 | |
aspeed/sdmc: Check RAM size value at realize time
The RAM size of the SDMC device is validated for the SoC and set when
the Aspeed machines are initialized and then later used by several
SoC implementations. However, the SDMC model never checks that the RAM
size has been actually set before being used. Do that at realize.
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Jamin_lin < jamin_lin@aspeedtech.com>
| -rw-r--r-- | hw/misc/aspeed_sdmc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 93e2e29..44da085 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s); assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit); + + if (!s->ram_size) { + error_setg(errp, "RAM size is not set"); + return; + } + s->max_ram_size = asc->max_ram_size; memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s, |