diff options
| author | Bernhard Beschow <shentey@gmail.com> | 2025-01-08 10:25:25 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-13 17:16:04 +0100 |
| commit | 5df50b8e97377d2468bd8759ec3275e747a147bb (patch) | |
| tree | 27cd61fb5f870788b43bc03241ee7343ac4718c6 | |
| parent | 4572dacc33e232a7c951ba7ba7a20887fad29e71 (diff) | |
| download | qemu-5df50b8e97377d2468bd8759ec3275e747a147bb.zip qemu-5df50b8e97377d2468bd8759ec3275e747a147bb.tar.gz qemu-5df50b8e97377d2468bd8759ec3275e747a147bb.tar.bz2 | |
hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate
In U-Boot, the fsl_esdhc[_imx] driver waits for both "transmit completed" and
"DMA" bits in esdhc_send_cmd_common() by means of DATA_COMPLETE constant. QEMU
currently misses to set the DMA bit which causes the driver to loop forever. Fix
that by setting the DMA bit if enabled when doing DMA block transfers.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250108092538.11474-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| -rw-r--r-- | hw/sd/sdhci.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 299cd4b..a958c11 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -665,12 +665,13 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s) } } + if (s->norintstsen & SDHC_NISEN_DMA) { + s->norintsts |= SDHC_NIS_DMA; + } + if (s->blkcnt == 0) { sdhci_end_transfer(s); } else { - if (s->norintstsen & SDHC_NISEN_DMA) { - s->norintsts |= SDHC_NIS_DMA; - } sdhci_update_irq(s); } } @@ -691,6 +692,10 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s) } s->blkcnt--; + if (s->norintstsen & SDHC_NISEN_DMA) { + s->norintsts |= SDHC_NIS_DMA; + } + sdhci_end_transfer(s); } |