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authorSong Gao <gaosong@loongson.cn>2024-01-02 10:02:00 +0800
committerSong Gao <gaosong@loongson.cn>2024-01-06 10:18:52 +0800
commit5c23704e4725f935b3171787f00e9922a7fc58cb (patch)
tree84e4241d749c11fac87c766b06b297f28f8a99d2
parentbeb60920a1f7ffbf82b5ac72d5fc2b1ea0a65c66 (diff)
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target/loongarch: move translate modules to tcg/
Introduce the target/loongarch/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240102020200.3462097-2-gaosong@loongson.cn>
-rw-r--r--target/loongarch/meson.build15
-rw-r--r--target/loongarch/tcg/constant_timer.c (renamed from target/loongarch/constant_timer.c)0
-rw-r--r--target/loongarch/tcg/csr_helper.c (renamed from target/loongarch/csr_helper.c)0
-rw-r--r--target/loongarch/tcg/fpu_helper.c (renamed from target/loongarch/fpu_helper.c)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_arith.c.inc (renamed from target/loongarch/insn_trans/trans_arith.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_atomic.c.inc (renamed from target/loongarch/insn_trans/trans_atomic.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_bit.c.inc (renamed from target/loongarch/insn_trans/trans_bit.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_branch.c.inc (renamed from target/loongarch/insn_trans/trans_branch.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_extra.c.inc (renamed from target/loongarch/insn_trans/trans_extra.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_farith.c.inc (renamed from target/loongarch/insn_trans/trans_farith.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_fcmp.c.inc (renamed from target/loongarch/insn_trans/trans_fcmp.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_fcnv.c.inc (renamed from target/loongarch/insn_trans/trans_fcnv.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_fmemory.c.inc (renamed from target/loongarch/insn_trans/trans_fmemory.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_fmov.c.inc (renamed from target/loongarch/insn_trans/trans_fmov.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_memory.c.inc (renamed from target/loongarch/insn_trans/trans_memory.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_privileged.c.inc (renamed from target/loongarch/insn_trans/trans_privileged.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_shift.c.inc (renamed from target/loongarch/insn_trans/trans_shift.c.inc)0
-rw-r--r--target/loongarch/tcg/insn_trans/trans_vec.c.inc (renamed from target/loongarch/insn_trans/trans_vec.c.inc)0
-rw-r--r--target/loongarch/tcg/iocsr_helper.c (renamed from target/loongarch/iocsr_helper.c)0
-rw-r--r--target/loongarch/tcg/meson.build19
-rw-r--r--target/loongarch/tcg/op_helper.c (renamed from target/loongarch/op_helper.c)0
-rw-r--r--target/loongarch/tcg/tlb_helper.c (renamed from target/loongarch/tlb_helper.c)0
-rw-r--r--target/loongarch/tcg/translate.c (renamed from target/loongarch/translate.c)0
-rw-r--r--target/loongarch/tcg/vec_helper.c (renamed from target/loongarch/vec_helper.c)0
24 files changed, 20 insertions, 14 deletions
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index b3a0fb1..e84e4c5 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -5,29 +5,16 @@ loongarch_ss.add(files(
'cpu.c',
'gdbstub.c',
))
-loongarch_tcg_ss = ss.source_set()
-loongarch_tcg_ss.add(gen)
-loongarch_tcg_ss.add(files(
- 'fpu_helper.c',
- 'op_helper.c',
- 'translate.c',
- 'vec_helper.c',
-))
-loongarch_tcg_ss.add(zlib)
loongarch_system_ss = ss.source_set()
loongarch_system_ss.add(files(
'loongarch-qmp-cmds.c',
'machine.c',
- 'tlb_helper.c',
- 'constant_timer.c',
- 'csr_helper.c',
- 'iocsr_helper.c',
))
common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
-loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
+subdir('tcg')
target_arch += {'loongarch': loongarch_ss}
target_system_arch += {'loongarch': loongarch_system_ss}
diff --git a/target/loongarch/constant_timer.c b/target/loongarch/tcg/constant_timer.c
index 1851f53..1851f53 100644
--- a/target/loongarch/constant_timer.c
+++ b/target/loongarch/tcg/constant_timer.c
diff --git a/target/loongarch/csr_helper.c b/target/loongarch/tcg/csr_helper.c
index 5534155..5534155 100644
--- a/target/loongarch/csr_helper.c
+++ b/target/loongarch/tcg/csr_helper.c
diff --git a/target/loongarch/fpu_helper.c b/target/loongarch/tcg/fpu_helper.c
index f6753c5..f6753c5 100644
--- a/target/loongarch/fpu_helper.c
+++ b/target/loongarch/tcg/fpu_helper.c
diff --git a/target/loongarch/insn_trans/trans_arith.c.inc b/target/loongarch/tcg/insn_trans/trans_arith.c.inc
index 2be057e..2be057e 100644
--- a/target/loongarch/insn_trans/trans_arith.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_arith.c.inc
diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc
index 80c2e28..80c2e28 100644
--- a/target/loongarch/insn_trans/trans_atomic.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc
diff --git a/target/loongarch/insn_trans/trans_bit.c.inc b/target/loongarch/tcg/insn_trans/trans_bit.c.inc
index ee5fa00..ee5fa00 100644
--- a/target/loongarch/insn_trans/trans_bit.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_bit.c.inc
diff --git a/target/loongarch/insn_trans/trans_branch.c.inc b/target/loongarch/tcg/insn_trans/trans_branch.c.inc
index 221e515..221e515 100644
--- a/target/loongarch/insn_trans/trans_branch.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_branch.c.inc
diff --git a/target/loongarch/insn_trans/trans_extra.c.inc b/target/loongarch/tcg/insn_trans/trans_extra.c.inc
index cfa361f..cfa361f 100644
--- a/target/loongarch/insn_trans/trans_extra.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_extra.c.inc
diff --git a/target/loongarch/insn_trans/trans_farith.c.inc b/target/loongarch/tcg/insn_trans/trans_farith.c.inc
index f4a0dea..f4a0dea 100644
--- a/target/loongarch/insn_trans/trans_farith.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_farith.c.inc
diff --git a/target/loongarch/insn_trans/trans_fcmp.c.inc b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
index 3babf69..3babf69 100644
--- a/target/loongarch/insn_trans/trans_fcmp.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
diff --git a/target/loongarch/insn_trans/trans_fcnv.c.inc b/target/loongarch/tcg/insn_trans/trans_fcnv.c.inc
index 833c059..833c059 100644
--- a/target/loongarch/insn_trans/trans_fcnv.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fcnv.c.inc
diff --git a/target/loongarch/insn_trans/trans_fmemory.c.inc b/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc
index 13452bc..13452bc 100644
--- a/target/loongarch/insn_trans/trans_fmemory.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc
diff --git a/target/loongarch/insn_trans/trans_fmov.c.inc b/target/loongarch/tcg/insn_trans/trans_fmov.c.inc
index 5cbd9d3..5cbd9d3 100644
--- a/target/loongarch/insn_trans/trans_fmov.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fmov.c.inc
diff --git a/target/loongarch/insn_trans/trans_memory.c.inc b/target/loongarch/tcg/insn_trans/trans_memory.c.inc
index 42f4e74..42f4e74 100644
--- a/target/loongarch/insn_trans/trans_memory.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_memory.c.inc
diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 01d4572..01d4572 100644
--- a/target/loongarch/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
diff --git a/target/loongarch/insn_trans/trans_shift.c.inc b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
index 2f4bd6f..2f4bd6f 100644
--- a/target/loongarch/insn_trans/trans_shift.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index 92b1d22..92b1d22 100644
--- a/target/loongarch/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
diff --git a/target/loongarch/iocsr_helper.c b/target/loongarch/tcg/iocsr_helper.c
index 6cd01d5..6cd01d5 100644
--- a/target/loongarch/iocsr_helper.c
+++ b/target/loongarch/tcg/iocsr_helper.c
diff --git a/target/loongarch/tcg/meson.build b/target/loongarch/tcg/meson.build
new file mode 100644
index 0000000..bdf34f9
--- /dev/null
+++ b/target/loongarch/tcg/meson.build
@@ -0,0 +1,19 @@
+if 'CONFIG_TCG' not in config_all_accel
+ subdir_done()
+endif
+
+loongarch_ss.add([zlib, gen])
+
+loongarch_ss.add(files(
+ 'fpu_helper.c',
+ 'op_helper.c',
+ 'translate.c',
+ 'vec_helper.c',
+))
+
+loongarch_system_ss.add(files(
+ 'constant_timer.c',
+ 'csr_helper.c',
+ 'iocsr_helper.c',
+ 'tlb_helper.c',
+))
diff --git a/target/loongarch/op_helper.c b/target/loongarch/tcg/op_helper.c
index fe79c62..fe79c62 100644
--- a/target/loongarch/op_helper.c
+++ b/target/loongarch/tcg/op_helper.c
diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c
index 449043c..449043c 100644
--- a/target/loongarch/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
diff --git a/target/loongarch/translate.c b/target/loongarch/tcg/translate.c
index 21f4db6..21f4db6 100644
--- a/target/loongarch/translate.c
+++ b/target/loongarch/tcg/translate.c
diff --git a/target/loongarch/vec_helper.c b/target/loongarch/tcg/vec_helper.c
index 3faf52c..3faf52c 100644
--- a/target/loongarch/vec_helper.c
+++ b/target/loongarch/tcg/vec_helper.c