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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-06-26 19:55:19 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-06-26 19:55:19 +0000 |
| commit | 567d4107a67571f57bb5f8879258414a87f98a2b (patch) | |
| tree | 61571143419079c1002caca9dd6758eb142aa342 | |
| parent | a80dde08372ca86b48363dfee019af0dc3bc97aa (diff) | |
| download | qemu-567d4107a67571f57bb5f8879258414a87f98a2b.zip qemu-567d4107a67571f57bb5f8879258414a87f98a2b.tar.gz qemu-567d4107a67571f57bb5f8879258414a87f98a2b.tar.bz2 | |
qsub fix (Wolfgang Schildbach)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2024 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-arm/op.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/op.c b/target-arm/op.c index 619066d..f17b812 100644 --- a/target-arm/op.c +++ b/target-arm/op.c @@ -786,7 +786,7 @@ void OPPROTO op_subl_T0_T1_saturate(void) if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) { env->QF = 1; if (T0 & SIGNBIT) - T0 = 0x8000000; + T0 = 0x80000000; else T0 = 0x7fffffff; } |