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author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2018-11-27 12:55:59 +0400 |
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committer | Marc-André Lureau <marcandre.lureau@redhat.com> | 2019-01-07 16:18:42 +0400 |
commit | 51e5ef459eca045d7e8afe880ee60190f0b75b26 (patch) | |
tree | 3f89dce6705b253258e3deb79574e592bf077d53 | |
parent | 50545b2cc02942c1019edf5ecc79fa192c655295 (diff) | |
download | qemu-51e5ef459eca045d7e8afe880ee60190f0b75b26.zip qemu-51e5ef459eca045d7e8afe880ee60190f0b75b26.tar.gz qemu-51e5ef459eca045d7e8afe880ee60190f0b75b26.tar.bz2 |
arm: replace instance_post_init()
Replace arm_cpu_post_init() instance callback by calling it from leaf
classes, to avoid potential ordering issue with other post_init callbacks.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
-rw-r--r-- | target/arm/cpu-qom.h | 3 | ||||
-rw-r--r-- | target/arm/cpu.c | 30 | ||||
-rw-r--r-- | target/arm/cpu.h | 2 | ||||
-rw-r--r-- | target/arm/cpu64.c | 24 |
4 files changed, 49 insertions, 10 deletions
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index d135ff8..2049fa9 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -35,6 +35,8 @@ struct arm_boot_info; #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU +typedef struct ARMCPUInfo ARMCPUInfo; + /** * ARMCPUClass: * @parent_realize: The parent class' realize handler. @@ -47,6 +49,7 @@ typedef struct ARMCPUClass { CPUClass parent_class; /*< public >*/ + const ARMCPUInfo *info; DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } ARMCPUClass; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c8505ea..4c4e9e1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -740,7 +740,7 @@ static Property arm_cpu_pmsav7_dregion_property = static Property arm_cpu_initsvtor_property = DEFINE_PROP_UINT32("init-svtor", ARMCPU, init_svtor, 0); -static void arm_cpu_post_init(Object *obj) +void arm_cpu_post_init(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1457,8 +1457,10 @@ static void cortex_m33_initfn(Object *obj) static void arm_v7m_class_init(ObjectClass *oc, void *data) { + ARMCPUClass *acc = ARM_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); + acc->info = data; #ifndef CONFIG_USER_ONLY cc->do_interrupt = arm_v7m_cpu_do_interrupt; #endif @@ -1959,11 +1961,11 @@ static void arm_max_initfn(Object *obj) #endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */ -typedef struct ARMCPUInfo { +struct ARMCPUInfo { const char *name; void (*initfn)(Object *obj); void (*class_init)(ObjectClass *oc, void *data); -} ARMCPUInfo; +}; static const ARMCPUInfo arm_cpus[] = { #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) @@ -2113,6 +2115,7 @@ static void arm_host_initfn(Object *obj) ARMCPU *cpu = ARM_CPU(obj); kvm_arm_set_cpu_features_from_host(cpu); + arm_cpu_post_init(obj); } static const TypeInfo host_arm_cpu_type_info = { @@ -2127,14 +2130,30 @@ static const TypeInfo host_arm_cpu_type_info = { #endif +static void arm_cpu_instance_init(Object *obj) +{ + ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj); + + acc->info->initfn(obj); + arm_cpu_post_init(obj); +} + +static void cpu_register_class_init(ObjectClass *oc, void *data) +{ + ARMCPUClass *acc = ARM_CPU_CLASS(oc); + + acc->info = data; +} + static void cpu_register(const ARMCPUInfo *info) { TypeInfo type_info = { .parent = TYPE_ARM_CPU, .instance_size = sizeof(ARMCPU), - .instance_init = info->initfn, + .instance_init = arm_cpu_instance_init, .class_size = sizeof(ARMCPUClass), - .class_init = info->class_init, + .class_init = info->class_init ?: cpu_register_class_init, + .class_data = (void *)info, }; type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); @@ -2147,7 +2166,6 @@ static const TypeInfo arm_cpu_type_info = { .parent = TYPE_CPU, .instance_size = sizeof(ARMCPU), .instance_init = arm_cpu_initfn, - .instance_post_init = arm_cpu_post_init, .instance_finalize = arm_cpu_finalizefn, .abstract = true, .class_size = sizeof(ARMCPUClass), diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c943f35..3aedfee 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -884,6 +884,8 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) return container_of(env, ARMCPU, env); } +void arm_cpu_post_init(Object *obj); + uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz); #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e)) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1d57be0..4b544a1 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -364,11 +364,11 @@ static void aarch64_max_initfn(Object *obj) } } -typedef struct ARMCPUInfo { +struct ARMCPUInfo { const char *name; void (*initfn)(Object *obj); void (*class_init)(ObjectClass *oc, void *data); -} ARMCPUInfo; +}; static const ARMCPUInfo aarch64_cpus[] = { { .name = "cortex-a57", .initfn = aarch64_a57_initfn }, @@ -452,14 +452,30 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_arch_name = aarch64_gdb_arch_name; } +static void aarch64_cpu_instance_init(Object *obj) +{ + ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj); + + acc->info->initfn(obj); + arm_cpu_post_init(obj); +} + +static void cpu_register_class_init(ObjectClass *oc, void *data) +{ + ARMCPUClass *acc = ARM_CPU_CLASS(oc); + + acc->info = data; +} + static void aarch64_cpu_register(const ARMCPUInfo *info) { TypeInfo type_info = { .parent = TYPE_AARCH64_CPU, .instance_size = sizeof(ARMCPU), - .instance_init = info->initfn, + .instance_init = aarch64_cpu_instance_init, .class_size = sizeof(ARMCPUClass), - .class_init = info->class_init, + .class_init = info->class_init ?: cpu_register_class_init, + .class_data = (void *)info, }; type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); |