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authoryeeli <seven.yi.lee@gmail.com>2024-07-25 11:18:58 +0800
committerMichael S. Tsirkin <mst@redhat.com>2024-08-01 04:32:00 -0400
commit515457757ff8540c524ff39ea1d9564b251c6532 (patch)
tree2f20939ebbee03136e82a75ab2e6e8b6484411b4
parent9a45b0761628cc59267b3283a85d15294464ac31 (diff)
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intel_iommu: Fix for IQA reg read dropped DW field
If VT-D hardware supports scalable mode, Linux will set the IQA DW field (bit11). In qemu, the vtd_mem_write and vtd_update_iq_dw set DW field well. However, vtd_mem_read the DW field wrong because "& VTD_IQA_QS" dropped the value of DW. Replace "&VTD_IQA_QS" with "& (VTD_IQA_QS | VTD_IQA_DW_MASK)" could save the DW field. Test patch as below: config the "x-scalable-mode" option: "-device intel-iommu,caching-mode=on,x-scalable-mode=on,aw-bits=48" After Linux OS boot, check the IQA_REG DW Field by usage 1 or 2: 1. IOMMU_DEBUGFS: Before fix: cat /sys/kernel/debug/iommu/intel/iommu_regset |grep IQA IQA 0x90 0x00000001001da001 After fix: cat /sys/kernel/debug/iommu/intel/iommu_regset |grep IQA IQA 0x90 0x00000001001da801 Check DW field(bit11) is 1. 2. devmem2 read the IQA_REG (offset 0x90): Before fix: devmem2 0xfed90090 /dev/mem opened. Memory mapped at address 0x7f72c795b000. Value at address 0xFED90090 (0x7f72c795b090): 0x1DA001 After fix: devmem2 0xfed90090 /dev/mem opened. Memory mapped at address 0x7fc95281c000. Value at address 0xFED90090 (0x7fc95281c090): 0x1DA801 Check DW field(bit11) is 1. Signed-off-by: yeeli <seven.yi.lee@gmail.com> Message-Id: <20240725031858.1529902-1-seven.yi.lee@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/i386/intel_iommu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 9a768f0..16d2885 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2947,7 +2947,9 @@ static uint64_t vtd_mem_read(void *opaque, hwaddr addr, unsigned size)
/* Invalidation Queue Address Register, 64-bit */
case DMAR_IQA_REG:
- val = s->iq | (vtd_get_quad(s, DMAR_IQA_REG) & VTD_IQA_QS);
+ val = s->iq |
+ (vtd_get_quad(s, DMAR_IQA_REG) &
+ (VTD_IQA_QS | VTD_IQA_DW_MASK));
if (size == 4) {
val = val & ((1ULL << 32) - 1);
}