aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-08 15:54:34 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-06-09 19:32:49 -0400
commit513598050ad12641b2dde6cf27471faca65be48f (patch)
tree7c7512f85dddee8561e02f5c896c9a5bf5e6805e
parent03b39fcf64bc958e3223e1d696f9de06de904fc6 (diff)
downloadqemu-513598050ad12641b2dde6cf27471faca65be48f.zip
qemu-513598050ad12641b2dde6cf27471faca65be48f.tar.gz
qemu-513598050ad12641b2dde6cf27471faca65be48f.tar.bz2
hw/acpi/cxl: Pass in the CXLState directly rather than MachineState
Refactoring step on path to moving all CXL state out of MachineState. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Message-Id: <20220608145440.26106-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/acpi/cxl.c9
-rw-r--r--hw/i386/acpi-build.c4
-rw-r--r--include/hw/acpi/cxl.h5
3 files changed, 9 insertions, 9 deletions
diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 31d5235..2bf8c07 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -65,9 +65,8 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
* Interleave ways encoding in CXL 2.0 ECN: 3, 6, 12 and 16-way memory
* interleaving.
*/
-static void cedt_build_cfmws(GArray *table_data, MachineState *ms)
+static void cedt_build_cfmws(GArray *table_data, CXLState *cxls)
{
- CXLState *cxls = ms->cxl_devices_state;
GList *it;
for (it = cxls->fixed_windows; it; it = it->next) {
@@ -129,9 +128,9 @@ static int cxl_foreach_pxb_hb(Object *obj, void *opaque)
return 0;
}
-void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data,
+void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
BIOSLinker *linker, const char *oem_id,
- const char *oem_table_id)
+ const char *oem_table_id, CXLState *cxl_state)
{
Aml *cedt;
AcpiTable table = { .sig = "CEDT", .rev = 1, .oem_id = oem_id,
@@ -144,7 +143,7 @@ void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data,
/* reserve space for CEDT header */
object_child_foreach_recursive(object_get_root(), cxl_foreach_pxb_hb, cedt);
- cedt_build_cfmws(cedt->buf, ms);
+ cedt_build_cfmws(cedt->buf, cxl_state);
/* copy AML table into ACPI tables blob and patch header there */
g_array_append_vals(table_data, cedt->buf->data, cedt->buf->len);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f41e14a..663c34b 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2615,8 +2615,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
x86ms->oem_id, x86ms->oem_table_id);
}
if (machine->cxl_devices_state->is_enabled) {
- cxl_build_cedt(machine, table_offsets, tables_blob, tables->linker,
- x86ms->oem_id, x86ms->oem_table_id);
+ cxl_build_cedt(table_offsets, tables_blob, tables->linker,
+ x86ms->oem_id, x86ms->oem_table_id, machine->cxl_devices_state);
}
acpi_add_table(table_offsets, tables_blob);
diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h
index 0c49653..acf4418 100644
--- a/include/hw/acpi/cxl.h
+++ b/include/hw/acpi/cxl.h
@@ -19,10 +19,11 @@
#define HW_ACPI_CXL_H
#include "hw/acpi/bios-linker-loader.h"
+#include "hw/cxl/cxl.h"
-void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data,
+void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
BIOSLinker *linker, const char *oem_id,
- const char *oem_table_id);
+ const char *oem_table_id, CXLState *cxl_state);
void build_cxl_osc_method(Aml *dev);
#endif