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author | Peter Maydell <peter.maydell@linaro.org> | 2017-01-20 11:15:07 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-20 11:15:07 +0000 |
commit | 4d2ec4da1c2d60c9fd8bad137506870c2f980410 (patch) | |
tree | 9126f0bd6dfb0f1c5a5f12cdb5586692d2454bf8 | |
parent | 87a4b270348c69a446ebcddc039bfae31b1675cb (diff) | |
download | qemu-4d2ec4da1c2d60c9fd8bad137506870c2f980410.zip qemu-4d2ec4da1c2d60c9fd8bad137506870c2f980410.tar.gz qemu-4d2ec4da1c2d60c9fd8bad137506870c2f980410.tar.bz2 |
target/arm: Implement DBGVCR32_EL2 system register
The DBGVCR_EL2 system register is needed to run a 32-bit
EL1 guest under a Linux EL2 64-bit hypervisor. Its only
purpose is to provide AArch64 with access to the state of
the DBGVCR AArch32 register. Since we only have a dummy
DBGVCR, implement a corresponding dummy DBGVCR32_EL2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
-rw-r--r-- | target/arm/helper.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index ba72ebb..7111c8c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4066,6 +4066,13 @@ static const ARMCPRegInfo debug_cp_reginfo[] = { .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0, .access = PL1_RW, .accessfn = access_tda, .type = ARM_CP_NOP }, + /* Dummy DBGVCR32_EL2 (which is only for a 64-bit hypervisor + * to save and restore a 32-bit guest's DBGVCR) + */ + { .name = "DBGVCR32_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 2, .opc1 = 4, .crn = 0, .crm = 7, .opc2 = 0, + .access = PL2_RW, .accessfn = access_tda, + .type = ARM_CP_NOP }, /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications * Channel but Linux may try to access this register. The 32-bit * alias is DBGDCCINT. |