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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-16 12:08:40 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-01-14 17:13:53 +0100 |
| commit | 4d1524d2ce2f809ae514b23f8e9d502d051c6df4 (patch) | |
| tree | aa87ff789f31960280b6459a1a53fce0c187a486 | |
| parent | f395cef7656e794a5c6c007bdf661603410640d8 (diff) | |
| download | qemu-4d1524d2ce2f809ae514b23f8e9d502d051c6df4.zip qemu-4d1524d2ce2f809ae514b23f8e9d502d051c6df4.tar.gz qemu-4d1524d2ce2f809ae514b23f8e9d502d051c6df4.tar.bz2 | |
target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3
Use the single ISA_MIPS32R3 definition to check if the Release 3
ISA is supported, whether the CPU support 32/64-bit.
For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R3 in few commits.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-9-f4bug@amsat.org>
| -rw-r--r-- | target/mips/mips-defs.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index b36b59c..ccdde0b 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -19,7 +19,6 @@ #define ISA_MIPS32 0x0000000000000020ULL #define ISA_MIPS32R2 0x0000000000000040ULL #define ISA_MIPS32R3 0x0000000000000200ULL -#define ISA_MIPS64R3 0x0000000000000400ULL #define ISA_MIPS32R5 0x0000000000000800ULL #define ISA_MIPS64R5 0x0000000000001000ULL #define ISA_MIPS32R6 0x0000000000002000ULL @@ -81,7 +80,7 @@ /* MIPS Technologies "Release 3" */ #define CPU_MIPS32R3 (CPU_MIPS32R2 | ISA_MIPS32R3) -#define CPU_MIPS64R3 (CPU_MIPS64R2 | CPU_MIPS32R3 | ISA_MIPS64R3) +#define CPU_MIPS64R3 (CPU_MIPS64R2 | CPU_MIPS32R3) /* MIPS Technologies "Release 5" */ #define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS32R5) |