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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-03-09 17:46:16 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-16 16:30:29 -0700 |
| commit | 4baf3978c02b387c39dc6a75d323126ab386aece (patch) | |
| tree | 6e31f403ca04bf2a5dda3109815222c6adb838b5 | |
| parent | fcdab382c8b92bcc689b18f8ba5cd036139945bf (diff) | |
| download | qemu-4baf3978c02b387c39dc6a75d323126ab386aece.zip qemu-4baf3978c02b387c39dc6a75d323126ab386aece.tar.gz qemu-4baf3978c02b387c39dc6a75d323126ab386aece.tar.bz2 | |
tcg: Add addr_type to TCGContext
This will enable replacement of TARGET_LONG_BITS within tcg/.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | accel/tcg/translate-all.c | 2 | ||||
| -rw-r--r-- | include/tcg/tcg.h | 1 | ||||
| -rw-r--r-- | tcg/tcg.c | 3 |
3 files changed, 6 insertions, 0 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 7b7d9a5..99a9d0e 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -356,6 +356,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb_set_page_addr0(tb, phys_pc); tb_set_page_addr1(tb, -1); tcg_ctx->gen_tb = tb; + tcg_ctx->addr_type = TCG_TYPE_TL; + tb_overflow: #ifdef CONFIG_PROFILER diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 42a3c05..b9748fd 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -558,6 +558,7 @@ struct TCGContext { int nb_temps; int nb_indirects; int nb_ops; + TCGType addr_type; /* TCG_TYPE_I32 or TCG_TYPE_I64 */ TCGRegSet reserved_regs; intptr_t current_frame_offset; @@ -1520,6 +1520,9 @@ void tcg_func_start(TCGContext *s) QTAILQ_INIT(&s->ops); QTAILQ_INIT(&s->free_ops); QSIMPLEQ_INIT(&s->labels); + + tcg_debug_assert(s->addr_type == TCG_TYPE_I32 || + s->addr_type == TCG_TYPE_I64); } static TCGTemp *tcg_temp_alloc(TCGContext *s) |